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Dimitris Nikolaidis

Publications and source records attributed to Dimitris Nikolaidis.

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Long Sync Word Frame Synchronization for Future Wireless Networks

Frame synchronization is the act of accurately detecting frames in an incoming transmission and extracting their payload. It is especially important in environments such as wireless channels where signals are significantly distorted. Digital correlation is the simplest form of frame synchronization where XNOR gates and summations are used to perform correlation and detect binary sync words attached to each frame. In this paper we demonstrate how digital correlation with long syncwords in the context of a standard modem (modulator/demodulator) chain solves the problem of frame synchronization under significant signal distortions in a practically implementable manner with minimal extra resources. The scheme consists of two parts, the modem chain and the frame synchronization architecture. The modem chain is built inside GNU radio software tool and the architecture inside VIVADO. Data transmission and reception in the Rayleigh NLOS channel is performed by the modem and frame synchronization by the architecture with data produced by GNU radio via a verilog testbench. Results indicate high synchronization accuracy with distortion levels much higher than what is reported by other methods.

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Parameterized Hardware Architecture for Frame Synchronization at all Noise Levels

Frame synchronization is the act of discerning the first bit of a valid data frame inside an incoming transmission. This is particularly important in high-noise environments where the communication channel significantly alters transmitted signals. Sync word frame synchronization is a subcategory of synchronization methods where sync words are detected through digital correlation. Despite its simplicity, this method has been overlooked in literature in favor of more sophisticated and mathematically more optimal solutions. In this article we employ binary sync-word correlation-based synchronization to achieve near perfect frame synchronization at any noise level. The proposed architecture leverages XNOR gates, adder and comparator tree structures to detect sync words that are placed in front of the frames through digital correlation. The tree structures are circuit elements that mimic binary trees in form and provide the summation (adder tree) or the maximum/minimum (comparator tree) of a set of binary numbers as output. Due to their minimalistic nature, synchronization can be implemented practically for very large sync word sizes (>500 bit) with multigigabit bit rates (>20 Gbps) and very high accuracy (10e-5 synchronization error when the bit error rate on the bitstream is close to 0.3) on commercial FPGAs. The architecture also delivers the payload of the frames to its output as an extra function.

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Custom frame synchronization for easy and rapid deployment

We propose a novel and efficient, custom frame synchronization architecture aimed at rapid deployment on any hardware platform. Frame synchronization is the process of discerning valid data frames from an incoming transmission and in this article it is accomplished by attaching distinctive binary overhead sequences on the frame. These sequences act as markers for the frames and enable the capture of their payload. They have certain properties and can be detected by using only simple hardware constructs like XNOR gates and few-bit adders with adequate accuracy. A low-cost commercial FPGA was used for implementation (NEXYS 4 DDR).

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