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Drew Schlesener

Publications and source records attributed to Drew Schlesener.

2 recordsLinked to original sources

AI-Native Open RAN: A Roadmap from xApps and rApps to Autonomous Network Agents

Open Radio Access Networks (O-RAN) have emerged as a transformative paradigm for future wireless systems by introducing openness, virtualization, disaggregation, and programmable intelligence through the RAN Intelligent Controller (RIC). The availability of standardized interfaces and near-real-time control loops has created unprecedented opportunities for integrating artificial intelligence (AI) into radio access network management and optimization. Over the past several years, a broad range of AI techniques have been proposed to address key O-RAN challenges such as radio resource management, network slicing, traffic prediction, mobility management, interference mitigation, and spectrum sharing. Despite significant progress, existing solutions often remain task-specific, require extensive retraining, and exhibit limited generalization across deployment environments and network conditions. This paper presents a comprehensive review of AI-enabled O-RAN systems and provides a unifying perspective on the evolution of intelligence in wireless networks. We first examine the O-RAN architecture and the role of intelligence within near-real-time and non-real-time RIC frameworks. We then develop a taxonomy of AI approaches for O-RAN, covering machine learning, deep reinforcement learning (DRL), digital-twin-assisted optimization, and emerging foundation-model-based architectures.

cs.NI

An FPGA-in-the-Loop Testbed for MU-MIMO OFDM Beamforming over Ray-Traced Wireless Channels

Wireless networks face ever expanding throughput demands from heterogeneous, high-density user populations, requiring beamforming algorithms that adapt to channel conditions with low latency. Validating such algorithms requires either costly over-the-air testbeds or simulation environments that lack the timing and resource constraints of real hardware, leaving a gap between algorithm design and hardware-realizable deployment. This work presents a hardware-in-the-loop (HIL) testbed that closes that gap by coupling an FPGA-based implementation of OFDM Waveforms with MU-MIMO beamforming to NVIDIA Sionna's ray-tracing channel simulator, enabling a physical base-station architecture to transmit and receive against a Sionna-rendered digital-twin propagation environment in real time. Unlike prior work that validates beamforming algorithms either purely in simulation or on full RF testbeds, this architecture allows beamforming logic running on actual FPGA fabric to be evaluated under realistic, controllable, and repeatable channel conditions, including UE mobility and site-specific multi-path, without requiring an anechoic chamber or live RF front end. We detail the FPGA OFDM transmit/receive pipeline, the synchronization and data interface between the FPGA and the Sionna environment, and validation of signal quality under AWGN and ray-traced channel conditions, establishing this testbed as a platform for hardware-validated beamforming research.

cs.NI