arXiv subjects

Dripto M. Debroy

Publications and source records attributed to Dripto M. Debroy.

28 records · Page 2Linked to original sources

arXiv2022

Overcoming leakage in scalable quantum error correction

Leakage of quantum information out of computational states into higher energy states represents a major challenge in the pursuit of quantum error correction (QEC). In a QEC circuit, leakage builds over time and spreads through multi-qubit interactions. This leads to correlated errors that degrade the exponential suppression of logical error with scale, challenging the feasibility of QEC as a path towards fault-tolerant quantum computation. Here, we demonstrate the execution of a distance-3 surface code and distance-21 bit-flip code on a Sycamore quantum processor where leakage is removed from all qubits in each cycle. This shortens the lifetime of leakage and curtails its ability to spread and induce correlated errors. We report a ten-fold reduction in steady-state leakage population on the data qubits encoding the logical state and an average leakage population of less than $1 \times 10^{-3}$ throughout the entire device. The leakage removal process itself efficiently returns leakage population back to the computational basis, and adding it to a code circuit prevents leakage from inducing correlated error across cycles, restoring a fundamental assumption of QEC. With this demonstration that leakage can be contained, we resolve a key challenge for practical QEC at scale.

quant-ph↗

arXiv2022

Suppressing quantum errors by scaling a surface code logical qubit

Practical quantum computing will require error rates that are well below what is achievable with physical qubits. Quantum error correction offers a path to algorithmically-relevant error rates by encoding logical qubits within many physical qubits, where increasing the number of physical qubits enhances protection against physical errors. However, introducing more qubits also increases the number of error sources, so the density of errors must be sufficiently low in order for logical performance to improve with increasing code size. Here, we report the measurement of logical qubit performance scaling across multiple code sizes, and demonstrate that our system of superconducting qubits has sufficient performance to overcome the additional errors from increasing qubit number. We find our distance-5 surface code logical qubit modestly outperforms an ensemble of distance-3 logical qubits on average, both in terms of logical error probability over 25 cycles and logical error per cycle ($2.914\%\pm 0.016\%$ compared to $3.028\%\pm 0.023\%$). To investigate damaging, low-probability error sources, we run a distance-25 repetition code and observe a $1.7\times10^{-6}$ logical error per round floor set by a single high-energy event ($1.6\times10^{-7}$ when excluding this event). We are able to accurately model our experiment, and from this model we can extract error budgets that highlight the biggest challenges for future systems. These results mark the first experimental demonstration where quantum error correction begins to improve performance with increasing qubit number, illuminating the path to reaching the logical error rates required for computation.

quant-ph↗

arXiv2022

Hidden Inverses: Coherent Error Cancellation at the Circuit Level

Coherent gate errors are a concern in many proposed quantum computing architectures. These errors can be effectively handled through composite pulse sequences for single-qubit gates, however, such techniques are less feasible for entangling operations. In this work, we benchmark our coherent errors by comparing the actual performance of composite single-qubit gates to the predicted performance based on characterization of individual single-qubit rotations. We then propose a compilation technique, which we refer to as hidden inverses, that creates circuits robust to these coherent errors. We present experimental data showing that these circuits suppress both overrotation and phase misalignment errors in our trapped ion system.

quant-ph↗

arXiv2021

Building a Quantum Engineering Undergraduate Program

The rapidly growing quantum information science and engineering (QISE) industry will require both quantum-aware and quantum-proficient engineers at the bachelor's level. We provide a roadmap for building a quantum engineering education program to satisfy this need. For quantum-aware engineers, we describe how to design a first quantum engineering course accessible to all STEM students. For the education and training of quantum-proficient engineers, we detail both a quantum engineering minor accessible to all STEM majors, and a quantum track directly integrated into individual engineering majors. We propose that such programs typically require only three or four newly developed courses that complement existing engineering and science classes available on most larger campuses. We describe a conceptual quantum information science course for implementation at any post-secondary institution, including community colleges and military schools. QISE presents extraordinary opportunities to work towards rectifying issues of inclusivity and equity that continue to be pervasive within engineering. We present a plan to do so and describe how quantum engineering education presents an excellent set of education research opportunities. Finally, we outline a hands-on training plan on quantum hardware, a key component of any quantum engineering program, with a variety of technologies including optics, atoms and ions, cryogenic and solid-state technologies, nanofabrication, and control and readout electronics. Our recommendations provide a flexible framework that can be tailored for academic institutions ranging from teaching and undergraduate-focused two- and four-year colleges to research-intensive universities.

physics.ed-ph↗

arXiv2021

Optimizing Stabilizer Parities for Improved Logical Qubit Memories

We study variants of Shor's code that are adept at handling single-axis correlated idling errors, which are commonly observed in many quantum systems. By using the repetition code structure of the Shor's code basis states, we calculate the logical channel applied to the encoded information when subjected to coherent and correlated single qubit idling errors, followed by stabilizer measurement. Changing the signs of the stabilizer generators allows us to change how the coherent errors interfere, leading to a quantum error correcting code which performs as well as a classical repetition code of equivalent distance against these errors. We demonstrate a factor of 4 improvement of the logical memory in a distance-3 logical qubit implemented on a trapped-ion quantum computer. Even-distance versions of our Shor code variants are decoherence-free subspaces and fully robust to identical and independent coherent idling noise.

quant-ph↗

arXiv2021

Extended flag gadgets for low-overhead circuit verification

Flag verification techniques are useful in quantum error correction for detecting critical faults. Here we present an application of flag verification techniques to improving post-selected performance of near-term algorithms. We extend the definition of what constitutes a flag by creating error-detection gadgets based on known transformations of unitary operators. In the case of Clifford or near-Clifford circuits, these unitary operators can be chosen to be controlled Pauli gates, leading to gadgets which require only a small number of additional Clifford gates. We show that such flags can improve circuit fidelities by up to a factor of 2 after post selection, and demonstrate their effectiveness over error models featuring single-qubit depolarizing noise, crosstalk, and two-qubit coherent overrotation.

quant-ph↗

arXiv2021

Fault-Tolerant Operation of a Quantum Error-Correction Code

Quantum error correction protects fragile quantum information by encoding it into a larger quantum system. These extra degrees of freedom enable the detection and correction of errors, but also increase the operational complexity of the encoded logical qubit. Fault-tolerant circuits contain the spread of errors while operating the logical qubit, and are essential for realizing error suppression in practice. While fault-tolerant design works in principle, it has not previously been demonstrated in an error-corrected physical system with native noise characteristics. In this work, we experimentally demonstrate fault-tolerant preparation, measurement, rotation, and stabilizer measurement of a Bacon-Shor logical qubit using 13 trapped ion qubits. When we compare these fault-tolerant protocols to non-fault tolerant protocols, we see significant reductions in the error rates of the logical primitives in the presence of noise. The result of fault-tolerant design is an average state preparation and measurement error of 0.6% and a Clifford gate error of 0.3% after error correction. Additionally, we prepare magic states with fidelities exceeding the distillation threshold, demonstrating all of the key single-qubit ingredients required for universal fault-tolerant operation. These results demonstrate that fault-tolerant circuits enable highly accurate logical primitives in current quantum systems. With improved two-qubit gates and the use of intermediate measurements, a stabilized logical qubit can be achieved.

quant-ph↗

arXiv2020

TILT: Achieving Higher Fidelity on a Trapped-Ion Linear-Tape Quantum Computing Architecture

Trapped-ion qubits are a leading technology for practical quantum computing. In this work, we present an architectural analysis of a linear-tape architecture for trapped ions. In order to realize our study, we develop and evaluate mapping and scheduling algorithms for this architecture. In particular, we introduce TILT, a linear "Turing-machine-like" architecture with a multilaser control "head", where a linear chain of ions moves back and forth under the laser head. We find that TILT can substantially reduce communication as compared with comparable-sized Quantum Charge Coupled Device (QCCD) architectures. We also develop two important scheduling heuristics for TILT. The first heuristic reduces the number of swap operations by matching data traveling in opposite directions into an "opposing swap", and also avoids the maximum swap distance across the width of the head, as maximum swap distances make scheduling multiple swaps in one head position difficult. The second heuristic minimizes ion chain motion by scheduling the tape to the position with the maximal executable operations for every movement. We provide application performance results from our simulation, which suggest that TILT can outperform QCCD in a range of NISQ applications in terms of success rate (up to 4.35x and 1.95x on average). We also discuss using TILT as a building block to extend existing scalable trapped-ion quantum computing proposals.

quant-ph↗

arXiv2020

Architecting Noisy Intermediate-Scale Trapped Ion Quantum Computers

Trapped ions (TI) are a leading candidate for building Noisy Intermediate-Scale Quantum (NISQ) hardware. TI qubits have fundamental advantages over other technologies such as superconducting qubits, including high qubit quality, coherence and connectivity. However, current TI systems are small in size, with 5-20 qubits and typically use a single trap architecture which has fundamental scalability limitations. To progress towards the next major milestone of 50-100 qubits, a modular architecture termed the Quantum Charge Coupled Device (QCCD) has been proposed. In a QCCD-based TI device, small traps are connected through ion shuttling. While the basic hardware components for such devices have been demonstrated, building a 50-100 qubit system is challenging because of a wide range of design possibilities for trap sizing, communication topology and gate implementations and the need to match diverse application resource requirements. Towards realizing QCCD systems with 50-100 qubits, we perform an extensive architectural study evaluating the key design choices of trap sizing, communication topology and operation implementation methods. We built a design toolflow which takes a QCCD architecture's parameters as input, along with a set of applications and realistic hardware performance models. Our toolflow maps the applications onto the target device and simulates their execution to compute metrics such as application run time, reliability and device noise rates. Using six applications and several hardware design points, we show that trap sizing and communication topology choices can impact application reliability by up to three orders of magnitude. Microarchitectural gate implementation choices influence reliability by another order of magnitude. From these studies, we provide concrete recommendations to tune these choices to achieve highly reliable and performant application executions.

quant-ph↗

arXiv2020

Logical Performance of 9 Qubit Compass Codes in Ion Traps with Crosstalk Errors

We simulate four quantum error correcting codes under error models inspired by realistic noise sources in near-term ion trap quantum computers: $T_2$ dephasing, gate overrotation, and crosstalk. We use this data to find preferred codes for given error parameters along with logical error biases and a pseudothreshold which compares the physical and logical gate failure rates for a CNOT gate. Using these results we conclude that Bacon-Shor-13 is the most promising near term candidate as long as the impact of crosstalk can be mitigated through other means.

quant-ph↗