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Dumitra Iancu

Publications and source records attributed to Dumitra Iancu.

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A Scalable 256-Antenna Distributed MIMO Testbed with Real-Time Fully Digital Beamforming

Distributed massive MIMO (D-MIMO) is a promising technology for future generation wireless systems as it takes advantage of both an increased array aperture and a decentralized processing architecture and topology. In order to truly understand the possibilities and limitations of these approaches in real scenarios, practical realization of testbeds is an essential step in the technology advancement. This work presents the Lund University Large Intelligent Surface testbed -- LuLIS, that can operate up to 256 coherent radio frequency (RF) chains using 16 AMD Zynq UltraScale RFSoC ZCU216 evaluation boards acting as distributed processing nodes. Real-time processing is facilitated by acceleration and distribution of MIMO processing algorithms on the FPGA fabric of the boards. The system is easily scalable, as increasing the number of antennas is done in multiples of 16 by adding more RFSoCs, which also implies addition of another processing node. The design allows up-scaling without hardware redesign, introduction of large latencies or data transfer overhead. The testbed is flexible in terms of deployment, with options of fully distributing the nodes (as in D-MIMO) or co-locating them (as in more traditional Massive MIMO). A detailed description of the implementation of the testbed is presented and initial results are shown for an uplink (UL) transmission from four single-antenna user equipments (UEs) to 64, 128 and 256 base-station antennas.

eess.SP

Spectrum Efficiency and Processing Latency Trade-offs in Panel-Based LIS

The next generation wireless systems will face stringent new requirements, including ultra-low latency, high data rates and enhanced reliability. Large Intelligent Surfaces, is one proposed solution that has the potential to solve these high demands. The real-life deployment of such systems involves different design considerations with non-trivial trade-offs. This paper investigates the trade-off between spectral efficiency and processing latency, considering different antenna distribution schemes and detection algorithms. A latency model for the physical layer processing has been developed, using real FPGA and application-specific instruction processor (ASIP) hardware implementation results. Simulation results using an indoor environment show that distributing antennas throughout the scenario improves overall reliability, while the impact from this on latency is limited both when using zero-forcing (ZF) and Minimum Mean Square Error (MMSE) detection. Changing the detection algorithm to maximum-ratio combining (MRC) from ZF or MMSE, however, reduces the latency significantly, even if a larger number of antennas are needed to achieve a similar spectrum efficiency.

eess.SP

Low-latency D-MIMO Localization using Distributed Scalable Message-Passing Algorithm

Distributed MIMO and integrated sensing and communication are expected to be key technologies in future wireless systems, enabling reliable, low-latency communication and accurate localization. Dedicated localization solutions must support distributed architecture, provide scalability across different system configurations and meet strict latency requirements. We present a scalable message-passing localization method and architecture co-designed for a panel-based distributed MIMO system and network topology, in which interconnected units operate without centralized processing. This method jointly detects line-of-sight paths to distributed units from multipath measurements in dynamic scenarios, localizes the agent, and achieves very low latency. Additionally, we introduce a cycle-accurate system latency model based on implemented FPGA operations, and show important insights into processing latency and hardware utilization and system-level trade-offs. We compare our method to a multipath-based localization method and show that it can achieve similar localization performance, with wide enough distribution of array elements, while offering lower latency and computational complexity.

eess.SP