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Eduard Alarcon

Publications and source records attributed to Eduard Alarcon.

31 records · Page 2Linked to original sources

Benchmarking Emerging Cavity-Mediated Quantum Interconnect Technologies for Modular Quantum Computers

Modularity is a promising approach for scaling up quantum computers and therefore integrating higher qubit counts. The essence of such architectures lies in their reliance on high-fidelity and fast quantum state transfers enabled by generating entanglement between chips. In addressing the challenge of implementing quantum coherent communication channels to interconnect quantum processors, various techniques have been proposed to account for qubit technology specifications and the implemented communication protocol. By employing Design Space Exploration (DSE) methodologies, this work presents a comparative analysis of the cavity-mediated interconnect technologies according to a defined figure of merit, and we identify the configurations related to the cavity and atomic decay rates as well as the qubit-cavity coupling strength that meet the efficiency thresholds. We therefore contribute to benchmarking contemporary cavity-mediated quantum interconnects and guide the development of reliable and scalable chip-to-chip links for modular quantum computers.

quant-ph↗

Profiling quantum circuits for their efficient execution on single- and multi-core architectures

Application-specific quantum computers offer the most efficient means to tackle problems intractable by classical computers. Realizing these architectures necessitates a deep understanding of quantum circuit properties and their relationship to execution outcomes on quantum devices. Our study aims to perform for the first time a rigorous examination of quantum circuits by introducing graph theory-based metrics extracted from their qubit interaction graph and gate dependency graph alongside conventional parameters describing the circuit itself. This methodology facilitates a comprehensive analysis and clustering of quantum circuits. Furthermore, it uncovers a connection between parameters rooted in both qubit interaction and gate dependency graphs, and the performance metrics for quantum circuit mapping, across a range of established quantum device and mapping configurations. Among the various device configurations, we particularly emphasize modular (i.e., multi-core) quantum computing architectures due to their high potential as a viable solution for quantum device scalability. This thorough analysis will help us to: i) identify key attributes of quantum circuits that affect the quantum circuit mapping performance metrics; ii) predict the performance on a specific chip for similar circuit structures; iii) determine preferable combinations of mapping techniques and hardware setups for specific circuits; and iv) define representative benchmark sets by clustering similarly structured circuits.

quant-ph↗

Toward Autonomous Cooperation in Heterogeneous Nanosatellite Constellations Using Dynamic Graph Neural Networks

The upcoming landscape of Earth Observation missions will defined by networked heterogeneous nanosatellite constellations required to meet strict mission requirements, such as revisit times and spatial resolution. However, scheduling satellite communications in these satellite networks through efficiently creating a global satellite Contact Plan (CP) is a complex task, with current solutions requiring ground-based coordination or being limited by onboard computational resources. The paper proposes a novel approach to overcome these challenges by modeling the constellations and CP as dynamic networks and employing graph-based techniques. The proposed method utilizes a state-of-the-art dynamic graph neural network to evaluate the performance of a given CP and update it using a heuristic algorithm based on simulated annealing. The trained neural network can predict the network delay with a mean absolute error of 3.6 minutes. Simulation results show that the proposed method can successfully design a contact plan for large satellite networks, improving the delay by 29.1%, similar to a traditional approach, while performing the objective evaluations 20x faster.

eess.SP↗

Spatio-Temporal Characterization of Qubit Routing in Connectivity-Constrained Quantum Processors

Designing efficient quantum processor topologies is pivotal for advancing scalable quantum computing architectures. The communication overhead, a critical factor affecting the execution fidelity of quantum circuits, arises from inevitable qubit routing that brings interacting qubits into physical proximity by the means of serial SWAP gates to enable the direct two-qubit gate application. Characterizing the qubit movement across the processor is crucial for tailoring techniques for minimizing the SWAP gates. This work presents a comparative analysis of the resulting communication overhead among three processor topologies: star, heavy-hexagon lattice, and square lattice topologies, according to performance metrics of communication-to-computation ratio, mean qubit hotspotness, and temporal burstiness, showcasing that the square lattice layout is favourable for quantum computer architectures at a scale.

quant-ph↗

Mapping quantum circuits to modular architectures with QUBO

Modular quantum computing architectures are a promising alternative to monolithic QPU (Quantum Processing Unit) designs for scaling up quantum devices. They refer to a set of interconnected QPUs or cores consisting of tightly coupled quantum bits that can communicate via quantum-coherent and classical links. In multi-core architectures, it is crucial to minimize the amount of communication between cores when executing an algorithm. Therefore, mapping a quantum circuit onto a modular architecture involves finding an optimal assignment of logical qubits (qubits in the quantum circuit) to different cores with the aim to minimize the number of expensive inter-core operations while adhering to given hardware constraints. In this paper, we propose for the first time a Quadratic Unconstrained Binary Optimization (QUBO) technique to encode the problem and the solution for both qubit allocation and inter-core communication costs in binary decision variables. To this end, the quantum circuit is split into slices, and qubit assignment is formulated as a graph partitioning problem for each circuit slice. The costly inter-core communication is reduced by penalizing inter-core qubit communications. The final solution is obtained by minimizing the overall cost across all circuit slices. To evaluate the effectiveness of our approach, we conduct a detailed analysis using a representative set of benchmarks having a high number of qubits on two different multi-core architectures. Our method showed promising results and performed exceptionally well with very dense and highly-parallelized circuits that require on average 0.78 inter-core communications per two-qubit gate.

quant-ph↗

Mapping quantum algorithms to multi-core quantum computing architectures

Current monolithic quantum computer architectures have limited scalability. One promising approach for scaling them up is to use a modular or multi-core architecture, in which different quantum processors (cores) are connected via quantum and classical links. This new architectural design poses new challenges such as the expensive inter-core communication. To reduce these movements when executing a quantum algorithm, an efficient mapping technique is required. In this paper, a detailed critical discussion of the quantum circuit mapping problem for multi-core quantum computing architectures is provided. In addition, we further explore the performance of a mapping method, which is formulated as a partitioning over time graph problem, by performing an architectural scalability analysis.

quant-ph↗

Enhanced intrinsic voltage gain in artificially stacked bilayer CVD graphene field effect transistors

We report on electronic transport in dual-gate, artificially stacked bilayer graphene field effect transistors (BiGFETs) fabricated from large-area chemical vapor deposited (CVD) graphene. The devices show enhanced tendency to current saturation, which leads to reduced minimum output conductance values. This results in improved intrinsic voltage gain of the devices when compared to monolayer graphene FETs. We employ a physics based compact model originally developed for Bernal stacked bilayer graphene FETs (BSBGFETs) to explore the observed phenomenon. The improvement in current saturation may be attributed to increased charge carrier density in the channel and thus reduced saturation velocity due to carrier-carrier scattering.

cond-mat.mes-hall↗

Multi-Wideband Terahertz Communications via Tunable Graphene-based Metasurfaces in 6G Networks

The next generation of wireless networks is expected to tap into the terahertz (0.1--10 THz) band to satisfy the extreme latency and bandwidth density requirements of future applications. However, the development of systems in this band is challenging as THz waves confront severe spreading and penetration losses, as well as molecular absorption, which leads to strong line-of-sight requirements through highly directive antennas. Recently, reconfigurable intelligent surfaces (RISs) have been proposed to address issues derived from non-line-of-sight propagation, among other impairments, by redirecting the incident wave toward the receiver and implementing virtual-line-of-sight communications. However, the benefits provided by a RIS may be lost if the network operates at multiple bands. In this position paper, the suitability of the RIS paradigm in indoor THz scenarios for 6G is assessed grounded on the analysis of a tunable graphene-based RIS that can operate in multiple wideband transparency windows. A possible implementation of such a RIS is provided and numerically evaluated at 0.65/0.85/1.05 THz separately, demonstrating that beam steering and other relevant functionalities are realizable with excellent performance. Finally, the challenges associated with the design and fabrication of multi-wideband graphene-based RISs are discussed, paving the way to the concurrent control of multiple THz bands in the context of 6G networks.

physics.app-ph↗

Workload Characterization of Programmable Metasurfaces

Metasurfaces are envisaged to play a key role in next-generation wireless systems due to their powerful control over electromagnetic waves. The last decade has witnessed huge advances in this regard, shifting from static to programmable metasurfaces. The HyperSurface (HSF) paradigm takes one step further by integrating a network of controllers within the device with the aim of adding intelligence, connectivity, and autonomy. However, little is known about the traffic that this network will have to support as the target electromagnetic function or boundary conditions change. In this paper, we lay down the foundations of a methodology to characterize the workload of programmable metasurfaces and then employ it to analyze the case of beam steering HSFs. We observe that traffic is bursty and highly dependent on the position of the target. These results will enable the early-stage evaluation of intra-HSF networks, as well as the estimation of the system performance and cost.

cs.NI↗

Exploration of Intercell Wireless Millimeter-Wave Communication in the Landscape of Intelligent Metasurfaces

Software-defined metasurfaces are electromagnetically ultra-thin, artificial components that can provide engineered and externally controllable functionalities. The control over these functionalities is enabled by the metasurface tunability, which is implemented by embedded electronic circuits that modify locally the surface resistance and reactance. Integrating controllers within the metasurface cells, able to intercommunicate and adaptively reconfigure it, thus imparting a desired electromagnetic operation, opens the path towards the creation of an artificially intelligent (AI) fabric where each unit cell can have its own sensing, programmable computing, and actuation facilities. In this work we take a crucial step towards bringing the AI metasurface technology to emerging applications, in particular exploring the wireless mm-wave intercell communication capabilities in a software-defined HyperSurface designed for operation is the microwave regime. We examine three different wireless communication channels within the landscape of the reflective metasurface: Firstly, in the layer where the control electronics of the HyperSurface lie, secondly inside a dedicated layer enclosed between two metallic plates, and, thirdly, inside the metasurface itself. For each case we examine the physical implementation of the mm-wave transponder nodes, we quantify communication channel metrics, and we identify complexity vs. performance trade-offs.

physics.app-ph↗

Intercell Wireless Communication in Software-defined Metasurfaces

Tunable metasurfaces are ultra-thin, artificial electromagnetic components that provide engineered and externally adjustable functionalities. The programmable metasurface, the HyperSurFace, concept consists in integrating controllers within the metasurface that interact locally and communicate globally to obtain a given electromagnetic behaviour. Here, we address the design constraints introduced by both functions accommodated by the programmable metasurface, i.e., the desired metasurface operation and the unit cells wireless communication enabling such programmable functionality. The design process for meeting both sets of specifications is thoroughly discussed. Two scenarios for wireless intercell communication are proposed. The first exploits the metasurface layer itself, while the second employs a dedicated communication layer beneath the metasurface backplane. Complexity and performance trade-offs are highlighted.

physics.app-ph↗

Leveraging Deliberately Generated Interferences for Multi-sensor Wireless RF Power Transmission

Wireless RF power transmission promises battery-less, resilient, and perpetual wireless sensor networks. Through the action of controllable Energy Transmitters (ETs) that operate at-a-distance, the sensors can be re-charged by harvesting the radiated RF energy. However, both the charging rate and effective charging range of the ETs are limited, and thus multiple ETs are required to cover large areas. While this action increases the amount of wireless energy injected into the network, there are certain areas where the RF energy combines destructively. To address this problem, we propose a duty-cycled random-phase multiple access (DRAMA). Non-intuitively, our approach relies on deliberately generating random interferences, both destructive and constructive, at the destination nodes. We demonstrate that DRAMA optimizes the power conversion efficiency, and the total amount of energy harvested. Through real-testbed experiments, we prove that our proposed scheme provides significant advantages over the current state of the art in our considered scenario, as it requires up to 70\% less input RF power to recharge the energy buffer of the sensor in the same time.

cs.NI↗

RF Performance Projections of Graphene FETs vs. Silicon MOSFETs

A graphene field-effect-transistor (GFET) model calibrated with extracted device parameters and a commercial 65 nm silicon MOSFET model are compared with respect to their radio frequency behavior. GFETs slightly lag behind CMOS in terms of speed despite their higher mobility. This is counterintuitive, but can be explained by the effect of a strongly nonlinear voltage-dependent gate capacitance. GFETs achieve their maximum performance only for narrow ranges of VDS and IDS, which must be carefully considered for circuit design. For our parameter set, GFETs require at least μ = 3000 cm2 V-1 s-1 to achieve the same performance as 65 nm silicon MOSFETs.

cond-mat.mes-hall↗