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Eneet Kaur

Publications and source records attributed to Eneet Kaur.

At least 19 recordsLinked to original sources

Towards the Characterization of Logical Errors in Distributed Lattice Surgery

Distributed quantum computing offers a scalable alternative to monolithic quantum processors by networking smaller quantum modules through shared entangled pairs. A central challenge in this setting is that inter-module quantum operations are typically noisier than intra-module local gates, which introduces additional noise into the system. In this work, we analyze distributed lattice surgery under heterogeneous noise conditions, focusing in particular on the merge operation as one of its fundamental subroutines. Specifically, we discuss the XX merge operation between two rotated surface-code patches hosted on two different quantum processors. We characterize logical errors in the resulting H-shaped spacetime diagram and estimate thresholds using a minimum-weight perfect matching (MWPM) decoder. We use a phenomenological noise model and derive distinct bulk and seam error rates to approximate a circuit-level noise model that includes contributions from local CNOT gates, noisy entangled pairs, idle errors, and readout errors. Our results provide practical insights into selecting the optimal surface-code distance, establishing target local-gate fidelities, and determining the tolerable entangled-pair fidelity required for logical operations in a distributed architecture.

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Impact of Network Constraints on Fault-Tolerant Distributed Quantum Computing

As we move towards scalable and modular quantum computing, quantum data centres become imperative. Existing analyses typically treat network constraints in isolation or through simplified models, leaving the interplay between error correction operations and communication resources underexplored. In this work, we present an end-to-end simulation framework that jointly models surface-code operations, internal QPU connectivity, and realistic network constraints including finite entanglement generation rates, limited communication qubits, and bandwidth contention, producing execution latency, from which logical error rate estimates are obtained. The framework is modular by design, allowing individual components such as routing heuristics, scheduling policies, and network topologies to be independently replaced. Numerical evaluation reveals distinct operating regimes in which the optimal resource allocation and code distance selection shift depending on the network characteristics. These results point to tradeoffs in the design of distributed quantum computing architectures that are not visible when computation and communication are modeled separately.

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ATHENA: A Compiler For Optimized Scheduling In Distributed Quantum Computers

Distributed Quantum Computers (DQCs) enable large system sizes by connecting smaller chips via photonic interconnects. DQCs use teleportation to relocate qubits and execute CNOTs between qubits on different chips. However, non-local CNOTs are 4.3-7.7$\times$ slower and 4$\times$ more error-prone than local CNOTs within a chip, which degrades program fidelities. Existing compilers group CNOTs with overlapping qubits into blocks and collectively optimize teleportations for each block. However, block-level scheduling has two key drawbacks. First, it lacks lookahead ability across blocks because it selects the optimal schedule for one block before proceeding to the next. As a result, it cannot assess the impact of a teleportation on future blocks. Our studies show that naively expanding the lookahead window to include subsequent blocks does not address this issue. Second, existing approaches do not schedule future block operations or the teleportations they require until preceding blocks are fully scheduled, introducing delay and latency overheads. We propose ATHENA, a DQC compiler that addresses these limitations using two key insights: Utility-driven Lookahead with Multi-Candidate Block Scheduling (UMS) and EPR-Capacity-Aware Early Scheduling (EES). UMS schedules a block by considering only useful future blocks in its lookahead window. A future block has utility if it shares overlapping qubits with the current block being scheduled. UMS also maintains multiple schedules during compilation, allowing it to defer commitment to globally sub-optimal schedules early in the compilation process. EES enables ATHENA to schedule future operations and their relocations early when EPR resources are available. Our evaluations show that ATHENA reduces teleportations by 34% on average and up to 65%, and reduces latency by 2$\times$ on average and up to 2.9$\times$ compared to the state-of-the-art.

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Distributed Quantum Error Correction with Bivariate Bicycle Codes in a Modular Architecture

Quantum low density parity check (qLDPC) codes, particularly bivariate bicycle (BB) codes, achieve competitive fault tolerance thresholds while offering substantially higher encoding rates than planar surface codes. However, their intrinsically long-range stabilizer structure makes them difficult to implement on monolithic devices with nearest neighbor connectivity and limited qubit capacity. In this work, we study the realization of a BB code in a modular multiprocessor architecture, where quantum processors are interconnected through shared Bell pairs. We consider processors with all to all internal connectivity, which is feasible on trapped ion and neutral atom platforms, enabling flexible local gate execution while inter-processor (nonlocal) gates are mediated by shared entanglement. We describe a star network architecture that can realize this distributed setting. We partition the qubits of the [[144,12,12]] BB code across 4, 6, and 12 quantum processors and analyze the resulting logical error rates and pseudo-threshold performance under circuit level noise by varying the number of processors and a scaling factor that captures the additional noise associated with nonlocal operations. We use Monte Carlo simulations with BP+OSD decoding and extend the previously known BB code ansatz to the distributed setting. Our results provide architectural insight and design considerations for distributed BB codes in modular quantum computing architectures.

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Lower bounds on bipartite entanglement in noisy graph states

Graph states are a key resource for a number of applications in quantum information theory. Due to the inherent noise in noisy intermediate-scale quantum (NISQ) era devices, it is important to understand the effects noise has on the usefulness of graph states. We consider a noise model where the initial qubits undergo depolarizing noise before the application of the CZ operations that generate edges between qubits situated at the nodes of the resulting graph state. For this model we develop a method for calculating the coherent information -- a lower bound on the rate at which entanglement can be distilled, across a bipartition of the graph state. We also identify some patterns on how adding more nodes or edges affects the bipartite distillable entanglement. As an application, we find a family of graph states that maintain a strictly positive coherent information for any amount of (non-maximal) depolarizing noise.

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RADAR-Q: Resource-Aware Distributed Asynchronous Routing for Entanglement Distribution in Multi-Tenant Quantum Networks

Scalable quantum networks must support concurrent entanglement requests, yet existing routing protocols fail when users compete for shared repeater resources, wasting fragile quantum states. This paper presents RADAR-Q, a resource-aware decentralized routing protocol embedding real-time resource contention into path selection. Unlike prior designs requiring global coordination or central anchors, RADAR-Q makes intelligent local decisions balancing path length and fidelity, instantaneous quantum memory availability, and intermediate Bell-State Measurement (BSM) operations. By identifying the Nearest Common Ancestor (NCA) within a DODAG hierarchy, RADAR-Q localizes entanglement swapping close to communicating users - avoiding unnecessary central detours and reducing BSM chain length and decoherence exposure. We evaluate RADAR-Q on grid and random topologies against synchronous and root-centric asynchronous baselines. Results show RADAR-Q achieves aggregate throughputs 2.5x and 7.6x higher than synchronized and root-centric designs, respectively. While baselines suffer catastrophic fidelity collapse below the 0.5 threshold under high load, RADAR-Q consistently maintains end-to-end fidelity above 0.76, ensuring pairs remain usable. Furthermore, RADAR-Q exhibits near-perfect fairness (Jain's Fairness Index 96-98%) and retains over 50% of its ideal throughput under stringent 1.0 ms coherence times. These findings establish contention-aware decentralized routing as a scalable foundation for multi-tenant quantum networks.

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Asynchronous Routing for Multipartite Entanglement in Quantum Networks

In quantum networks, one way to communicate is to distribute entanglements through swapping at intermediate nodes. Most existing work primarily aims to create efficient two-party end-to-end entanglement over long distances. However, some scenarios also require remote multipartite entanglement for applications such as quantum secret sharing and multi-party computation. Our previous study improved end-to-end entanglement rates using an asynchronous, tree-based routing scheme that relies solely on local knowledge of entanglement links, conserving unused entanglement and avoiding synchronous operations. This article extends this approach to multipartite entanglements, particularly the three-party Greenberger-Horne-Zeilinger (GHZ) states. It shows that our asynchronous protocol outperforms traditional synchronous methods in entanglement rates, especially as coherence times increase. This approach can also be extended to four-party and larger multipartite GHZ states, highlighting the effectiveness and adaptability of asynchronous routing for multipartite scenarios across various network topologies.

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Benchmarking Quantum Data Center Architectures: A Performance and Scalability Perspective

Scalable distributed quantum computing (DQC) has motivated the design of multiple quantum data-center (QDC) architectures that overcome the limitations of single quantum processors through modular interconnection. While these architectures adopt fundamentally different design philosophies, their relative performance under realistic quantum hardware constraints remains poorly understood. In this paper, we present a systematic benchmarking study of four representative QDC architectures-QFly, BCube, Clos, and Fat-Tree-quantifying their impact on distributed quantum circuit execution latency, resource contention, and scalability. Focusing on quantum-specific effects absent from classical data-center evaluations, we analyze how optical-loss-induced Einstein-Podolsky-Rosen (EPR) pair generation delays, coherence-limited entanglement retry windows, and contention from teleportation-based non-local gates shape end-to-end execution performance. Across diverse circuit workloads, we evaluate how architectural properties such as path diversity and path length, and shared BSM (Bell State Measurement) resources interact with optical-switch insertion loss and reconfiguration delay. Our results show that distributed quantum performance is jointly shaped by topology, scheduling policies, and physical-layer parameters, and that these factors interact in nontrivial ways. Together, these insights provide quantitative guidance for the design of scalable and high-performance quantum data-center architectures for DQC.

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Scalable low-latency entanglement distribution for distributed quantum computing

Practical distributed quantum computing and error correction require quantum networks with high-qubit-rate, high-fidelity, and low-reconfiguration-latency. Unfortunately, current approaches are limited by fundamental constraints: single-channel entanglement rates remain at the MHz level with millisecond-level reconfiguration, which is insufficient for fault-tolerant distributed quantum computing. Here, we propose a quantum network architecture that leverages reconfigurable quantum interfaces and wavelength-selective switches to overcome bandwidth and latency constraints. By tuning the frequency and temporal modes of photonic qubits across dense wavelength division multiplexing (DWDM) channels, our protocol achieves an entanglement generation rate of up to 183.4 MHz based on our comprehensive modeling of the networked cold atom computing systems. Our architecture enables nanosecond-scale network reconfiguration with low loss, low infidelity, and high dimensionality. Our modeling and simulation are designed for deployable distributed quantum computing and error correction, integrating the quantum interface, network switching, circuit compilation, and execution into a unified framework. The proposed architecture is fully compatible with industry-standard DWDM infrastructure, providing a scalable and cost-effective foundation for distributed quantum computing.

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Network Operations Scheduling for Distributed Quantum Computing

Realizing distributed architectures for quantum computing is crucial to scaling up computational power. A key component of such architectures is a scheduler that coordinates operations over a short-range quantum network required to enable the necessary non-local entangling gates between quantum processing units (QPUs). It is desirable to determine schedules of minimum make span, which in the case of networks with constrained resources hinges on their efficient usage. Here we compare and contrast two approaches to solving the make span minimization problem, an approach based on the resource constrained project scheduling (RCPSP) framework, and another based on a greedy heuristic algorithm. The workflow considered is as follows. Firstly, the computational circuit is partitioned and assigned to different QPUs such that the number of nonlocal entangling gates acting across partitions is minimized while the qubit load is nearly uniform on the individual QPUs, which can be accomplished using, e.g., the METIS solver. Secondly, the nonlocal entangling gate requirements with respect to the partitions are identified, and mapped to network operation sequences that deliver the necessary entanglement between the QPUs. Finally, the network operations are scheduled such that the make span is minimized. As illustrative examples, we analyze the implementation of a small instance of the Quantum Fourier Transform algorithm over instances of a simple hub and spoke (star) network architecture comprised of a quantum switch as the hub and QPUs as spokes, each with a finite qubit resource budget. In one instance, our results show the RCPSP approach outperforming the greedy heuristic. In another instance, we find the two performing equally well. Our results thus illustrate the effectiveness of the RCPSP framework, while also underlining the relevance and usefulness of greedy heuristics.

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Architectural Approaches to Fault-Tolerant Distributed Quantum Computing and Their Entanglement Overheads

Fault tolerant quantum computation over distributed quantum computing (DQC) platforms requires careful evaluation of resource requirements and noise thresholds. As quantum hardware advances toward modular and networked architectures, various fault tolerant DQC schemes have been proposed, which can be broadly categorized into three architectural types. Type 1 architectures consist of small quantum nodes connected via Greenberger-Horne-Zeilinger (GHZ) states, enabling nonlocal stabilizer measurements. Type 2 architectures distribute a large error correcting code block across multiple modules, with most stabilizer measurements remaining local, except for a small subset at patch boundaries that are performed using nonlocal CNOT gates. Type 3 architectures assign code blocks to distinct modules and can perform fault tolerant operations such as transversal gates, lattice surgery, and teleportation to implement logical operations between code blocks. Using the planar surface code and toric code as representative examples, we analyze how the resource requirements, particularly the number of Bell pairs and the average number of generation attempts, scale with increasing code distance across different architectural designs. This analysis provides valuable insights for identifying architectures well suited to fault tolerant distributed quantum computation under near term hardware and resource constraints.

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40Gbps Tri-type Quantum Random Number Generator

Traditional quantum random number generators can produce only one type of random number, while the optimal distribution of random numbers for different applications is usually distinct. The typical solution to this challenge is either using different quantum phenomena for different types of random number, or converting one distribution of random numbers to another type. However, the former solution requires multiple hardware systems, while the latter one sacrifices a lot of secure bits. Here, we develop a quantum random number generator that can on-demand produce three distribution types of random numbers at over 60 Gbits/s (Gbps) raw bits by measuring the quantum vacuum noise. After randomness extraction, over 42 Gbps secure bit rate is demonstrated for uniform random numbers, and over 14 Gbps secure bit rate for Gaussian random number. Due to the lack of Rayleigh randomness extraction, only denoised Rayleigh raw bits are generated. Switching between different types of random numbers is achieved in electronics, which does not affect the generation rate. The random numbers pass NIST and Dieharder tests, and are available for various applications, which can be continuously accessed via Cisco Quantum Random Number web service.

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Distributed Realization of Color Codes for Quantum Error Correction

Color codes are a leading class of topological quantum error-correcting codes with modest error thresholds and structural compatibility with two-dimensional architectures, which make them well-suited for fault-tolerant quantum computing (FTQC). Here, we propose and analyze a distributed architecture for realizing the (6.6.6) color code. The architecture involves interconnecting patches of the color code housed in different quantum processing units (QPUs) via entangled pairs. To account for noisy interconnects, we model the qubits in the color code as being subject to a bit-flip noise channel, where the qubits on the boundary (seam) between patches experience elevated noise compared to those in the bulk. We investigate the error threshold of the distributed color code under such asymmetric noise conditions by employing two decoders: a tensor-network-based decoder and a recently introduced concatenated Minimum Weight Perfect Matching (MWPM) algorithm. Our simulations demonstrate that elevated noise on seam qubits leads to a slight reduction in threshold for the tensor-network decoder, whereas the concatenated MWPM decoder shows no significant change in the error threshold, underscoring its effectiveness under asymmetric noise conditions. Our findings thus highlight the robustness of color codes in distributed architectures and provide valuable insights into the practical realization of FTQC involving noisy interconnects between QPUs.

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Network-Aware Scheduling for Remote Gate Execution in Quantum Data Centers

Modular quantum computing provides a scalable approach to overcome the limitations of monolithic quantum architectures by interconnecting multiple Quantum Processing Units (QPUs) through a quantum network. In this work, we explore and evaluate two entanglement scheduling strategies-static and dynamic-and analyze their performance in terms of circuit execution delay and network resource utilization under realistic assumptions and practical limitations such as probabilistic entanglement generation, limited communication qubits, photonic switch reconfiguration delays, and topology-induced contention. We show that dynamic scheduling consistently outperforms static scheduling in scenarios with high entanglement parallelism, especially when network resources are scarce. Furthermore, we investigate the impact of communication qubit coherence time, modeled as a cutoff for holding EPR pairs, and demonstrate that aggressive lookahead strategies can degrade performance when coherence times are short, due to premature entanglement discarding and wasted resources. We also identify congestion-free BSM provisioning by profiling peak BSM usage per switch. Our results provide actionable insights for scheduler design and resource provisioning in realistic quantum data centers, bringing system-level considerations closer to practical quantum computing deployment.

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iSwitch: QEC on Demand via In-Situ Encoding of Bare Qubits for Ion Trap Architectures

Recent advances in quantum hardware and error correction have paved the way for early fault-tolerant (EFT) quantum computing. We propose iSwitch, a hybrid system architecture for trapped-ion quantum computers (TIQC) that exploits ultra-high-fidelity single-qubit gates and efficient logical CNOTs enabled by ion shuttling. iSwitch employs bare qubits for single-qubit operations and QEC-encoded logical qubits for two-qubit gates, avoiding full logical encoding, gate synthesis, and magic state distillation. To enable this selective encoding, we develop a low-noise conversion protocol between bare and logical qubits, a hybrid instruction set tailored to 2D TIQC layouts, and a compiler that minimizes conversion overhead and optimizes scheduling. Evaluations on variational quantum algorithm benchmarks show that iSwitch achieves comparable fidelity to conventional QEC methods, while reducing qubit and operation counts by roughly 33-50%, offering a practical, resource-efficient path toward EFT quantum computing on trapped-ion platforms.

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Optimized Quantum Circuit Partitioning Across Multiple Quantum Processors

This paper addresses the challenge of scaling quantum computing by employing distributed quantum algorithms across multiple processors. We propose a novel circuit partitioning method that leverages graph partitioning to optimize both qubit and gate teleportation, minimizing the required Einstein-Podolsky-Rosen (EPR) pairs for executing general quantum circuits. Additionally, we formulate an integer linear program to further reduce entanglement requirements by mapping the logical resources of partitioned circuits to the physical constraints of the quantum network. Finally, we analyze the entanglement cost of implementing the Quantum Fourier Transform (QFT) across multiple QPUs, exploiting the circuit's structure to minimize total entanglement consumption.

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Quantum Data Center Infrastructures: A Scalable Architectural Design Perspective

This paper presents the design of scalable quantum networks that utilize optical switches to interconnect multiple quantum processors, facilitating large-scale quantum computing. By leveraging these novel architectures, we aim to address the limitations of current quantum processors and explore the potential of quantum data centers. We provide an in-depth analysis of these architectures through the development of simulation tools and performance metrics, offering a detailed comparison of their advantages and trade-offs. We hope this work serves as a foundation for the development of efficient and resilient quantum networks, designed to meet the evolving demands of future quantum computing applications.

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Resource-efficient loss-aware photonic graph state preparation using atomic emitters

Multi-qubit entangled photonic graph states are an important ingredient for all-photonic quantum computing, repeaters and networking. Preparing them using probabilistic stitching of single photons using linear optics presents a formidable resource challenge due to multiplexing needs. Quantum emitters provide a viable solution to prepare photonic graph states as they enable deterministic production of photons entangled with emitter qubits, and deterministic two-qubit interactions among emitters. A handful of emitters often suffice to generate useful-size graph states that would otherwise require millions of emitters used as single photon sources, using the linear-optics method. Photon loss however impedes the emitter method due to a large circuit depth, and hence loss accrual on the photons of the graph state produced, given the typically large number of slow two-qubit CNOT gates between emitters. We propose an algorithm that can trade the number of emitters with the graph-state depth, while minimizing the number of emitter CNOTs. We apply our algorithm to generate a repeater graph state (RGS) for a new all-photonic repeater protocol, which achieves a far superior rate-distance tradeoff compared to using the least number of emitters needed to generate the RGS. Yet, it needs five orders of magnitude fewer emitters than the multiplexed linear-optics method -- with each emitter used as a photon source -- to achieve a desired rate-distance performance.

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