arXiv subjects

George B. Long

Publications and source records attributed to George B. Long.

4 recordsLinked to original sources

arXiv2026

Design and Operation of Wafer-Scale Packages Containing >500 Superconducting Qubits

Packages capable of supporting large arrays of high-coherence superconducting qubits are vital for the realisation of fault-tolerant quantum computers and the necessary high-throughput metrology required to optimise fabrication and manufacturing processes. We present a wafer-scale packaging architecture supporting over 500 qubits on a single 3-inch die. The package is engineered to suppress parasitic RF modes, and to mitigate material loss through simulation-informed design while managing differential thermal contraction to ensure robust operation at millikelvin temperatures. System-level heat-load calculations from a large wiring payload show this package may be operated in commercial dilution refrigerators. Measurements of the qubits loaded into the package show median $T_1$, $T_{2e} \sim 100~μ$s ($\sim$100 qubits) alongside readout with median fidelity of 97.5% (54 qubits) and a median qubit temperature of 36 mK (54 qubits). These results validate the performance of these packages and demonstrate that large-scale integration can be achieved without compromising device performance. Finally, we highlight the utility of these packages as a tool for high throughput feedback on qubit figures of merit over large sample sizes, allowing identification of performance outliers in the tails of the coherence distribution, a critical capability for informing fabrication and manufacture of high-quality quantum qubits and quantum processors.

quant-ph↗

arXiv2026

Echo Cross Resonance gate error budgeting on a superconducting quantum processor

High fidelity quantum operations are key to enabling fault-tolerant quantum computation. Superconducting quantum processors have demonstrated high-fidelity operations, but on larger devices there is commonly a broad distribution of qualities, with the low-performing tail affecting near-term performance and applications. Here we present an error budgeting procedure for the native two-qubit operation on a 32-qubit superconducting-qubit-based quantum computer, the OQC Toshiko gen-1 system. We estimate the prevalence of different forms of error such as coherent error and control qubit leakage, then apply error suppression strategies based on the most significant sources of error, making use of pulse-shaping and additional compensating gates. These techniques require no additional hardware overhead and little additional calibration, making them suitable for routine adoption. An average reduction of 3.7x in error rate for two qubit operations is shown across a chain of 16 qubits, with the median error rate improving from 4.6$\%$ to 1.2$\%$ as measured by interleaved randomized benchmarking. The largest improvements are seen on previously under-performing qubit pairs, demonstrating the importance of practical error suppression in reducing the low-performing tail of gate qualities and achieving consistently good performance across a device.

quant-ph↗

arXiv2025

Thermal Capacity Mapping of Cryogenic Platforms for Quantum Computers

Large-scale cryogenic Input-Output (IO) infrastructure is a requirement for realising fault-tolerant quantum computing in solid-state modalities. Such IO scaling presents significant challenges in thermal modelling, hardware design and verification. Here we present a design tool for cryogenic platform development with applicability to quantum computing and other cryogenic technologies. By taking comprehensive measurements of a commercially available dilution refrigerator we construct a 'platform capacity map', quantifying the platform's complex response to heat loads distributed over multiple temperature stages and accounting for interstage dependencies, avoiding an analytical model. This allows for the modification of the platform parameters to be accurately estimated for the inclusion of an arbitrary IO infrastructure, the identification of stage thermal overheads and the optimisation of system parameters. We identify a key bottleneck around the Still stage, owing to loading from connected stages, and observe discrepancies between existing thermal modelling methods for estimating heat loads associated with IO and experimental results obtained from the platform capacity map.

quant-ph↗

arXiv2019

Capturing Complex Behaviour in Josephson Travelling Wave Parametric Amplifiers

We present an analysis of wave-mixing in recently developed Josephson Travelling Wave Parametric Amplifiers (JTWPAs). Circuit simulations performed using WRspice show the full behaviour of the JTWPA allowing propagation of all tones. The Coupled Mode Equations (CMEs) containing only pump, signal, and idler propagation are shown to be insufficient to completely capture complex mixing behaviour in the JTWPA. Extension of the CMEs through additional state vectors in the analytic solutions allows closer agreement with WRspice. We consider an ordered framework for the systematic inclusion of extended eigenmodes and make a qualitative comparison with WRspice at each step. The agreement between the two methods validates both approaches and provides insight into the operation of the JTWPA. We show that care should be taken when using the CMEs and propose that WRspice should be used as a design tool for non-linear superconducting circuits such as the JTWPA.

cond-mat.supr-con↗