arXiv subjects

Giacomo Pedretti

Publications and source records attributed to Giacomo Pedretti.

21 records · Page 2Linked to original sources

arXiv2020

One-step regression and classification with crosspoint resistive memory arrays

Machine learning has been getting a large attention in the recent years, as a tool to process big data generated by ubiquitous sensors in our daily life. High speed, low energy computing machines are in demand to enable real-time artificial intelligence at the edge, i.e., without the support of a remote frame server in the cloud. Such requirements challenge the complementary metal-oxide-semiconductor (CMOS) technology, which is limited by the Moore's law approaching its end and the communication bottleneck in conventional computing architecture. Novel computing concepts, architectures and devices are thus strongly needed to accelerate data-intensive applications. Here we show a crosspoint resistive memory circuit with feedback configuration can execute linear regression and logistic regression in just one step by computing the pseudoinverse matrix of the data within the memory. The most elementary learning operation, that is the regression of a sequence of data and the classification of a set of data, can thus be executed in one single computational step by the novel technology. One-step learning is further supported by simulations of the prediction of the cost of a house in Boston and the training of a 2-layer neural network for MNIST digit recognition. The results are all obtained in one computational step, thanks to the physical, parallel, and analog computing within the crosspoint array.

cs.LG↗

arXiv2020

Analog content addressable memories with memristors

A content-addressable-memory compares an input search word against all rows of stored words in an array in a highly parallel manner. While supplying a very powerful functionality for many applications in pattern matching and search, it suffers from large area, cost and power consumption, limiting its use. Past improvements have been realized by using memristors to replace the static-random-access-memory cell in conventional designs, but employ similar schemes based only on binary or ternary states for storage and search. We propose a new analog content-addressable-memory concept and circuit to overcome these limitations by utilizing the analog conductance tunability of memristors. Our analog content-addressable-memory stores data within the programmable conductance and can take as input either analog or digital search values. Experimental demonstrations, scaled simulations and analysis show that our analog content-addressable-memory can reduce area and power consumption, which enables the acceleration of existing applications, but also new computing application areas.

cs.ET↗

arXiv2019

Self-organizing memristive nanowire networks with structural plasticity emulate biological neuronal circuits

Acting as artificial synapses, two-terminal memristive devices are considered fundamental building blocks for the realization of artificial neural networks. Organized into large arrays with a top-down approach, memristive devices in conventional crossbar architecture demonstrated the implementation of brain-inspired computing for supervised and unsupervised learning. Alternative way using unconventional systems consisting of many interacting nano-parts have been proposed for the realization of biologically plausible architectures where the emergent behavior arises from a complexity similar to that of biological neural circuits. However, these systems were unable to demonstrate bio-realistic implementation of synaptic functionalities with spatio-temporal processing of input signals similarly to our brain. Here we report on emergent synaptic behavior of biologically inspired nanoarchitecture based on self-assembled and highly interconnected nanowire (NW) networks realized with a bottom up approach. The operation principle of this system is based on the mutual electrochemical interaction among memristive NWs and NW junctions composing the network and regulating its connectivity depending on the input stimuli. The functional connectivity of the system was shown to be responsible for heterosynaptic plasticity that was experimentally demonstrated and modelled in a multiterminal configuration, where the formation of a synaptic pathway between two neuron terminals is responsible for a variation in synaptic strength also at non-stimulated terminals. These results highlight the ability of nanowire memristive architectures for building brain-inspired intelligent systems based on complex networks able to physically compute the information arising from multi-terminal inputs.

physics.app-ph↗