arXiv subjects

Gregory Prigozhin

Publications and source records attributed to Gregory Prigozhin.

At least 19 recordsLinked to original sources

arXiv2026

Curving X-ray detectors for astrophysics applications

Next-generation X-ray optics will revolutionize high-energy astrophysics, yet they present several challenges to design a complementary focal plane. In particular, the focal surface is curved, requiring many small, flat sensors to achieve a large field. We present work building on MIT Lincoln Laboratory technology to curve the sensor itself, improving image quality and reducing complexity. Applying this technology to back-illuminated, large-format CCDs having well-characterized X-ray response, we describe the process and report success curving functional BI CCDs to a 2.5-m radius of curvature, achieving RMS curvature deviations less than 1 micron. We confirm that there is no appreciable increase in dark current and that the spectroscopic performance across the 0.3-6 keV band remains excellent. These results demonstrate that curved, large-format X-ray sensors are realizable, and the process can be extended to silicon detectors with other architectures, including active pixel sensors.

astro-ph.IM↗

arXiv2026

Fast, low noise, megapixel detector and readout systems for future X-ray astronomy missions

Next-generation strategic X-ray astronomy missions will require the simultaneous achievement of high angular resolution, large effective collecting area, and wide-field imaging with large-format focal plane detectors. Realizing the associated science objectives--ranging from precision measurements of bright point sources to the detection and characterization of faint diffuse emission-places stringent and, in some cases, competing requirements on detector performance. In particular, high frame rates are necessary to mitigate photon pile-up in observations of bright sources and to reduce contamination from particle-induced background in measurements of low surface brightness structures. At the same time, these instruments must preserve excellent soft X-ray response, which places tight constraints on read noise and on the fidelity of event characterization. State-of-the-art X-ray charge-coupled devices (CCDs) approach many of the key performance metrics required for these missions, but readout speed remains a primary limitation. Addressing this gap requires readout architectures that scale to high channel count, sustain high pixel throughput, and preserve the low-noise characteristics needed for soft X-ray sensitivity.

astro-ph.IM↗

arXiv2026

Advancing X-Ray Camera Front-End Electronics Architecture through the AXIS-TAP Technology Platform

Advancing time-domain soft X-ray astronomy demands focal plane readout electronics capable of high-speed digitization with low noise while maintaining spectral fidelity across multiple detector channels. The Advanced X-ray Imaging Satellite (AXIS), a NASA Probe-class mission concept, provided the driving requirements and heritage for developing a generalized high-speed (>=5 fps) camera Front-End Electronics (FEE) architecture applicable to future soft X-ray missions. The FEE architecture defines a modular, dual-box redundant configuration to operate a focal plane of four 16-channel CCDs, with functional partitioning for power distribution, thermal management, mechanism control, and image data acquisition and transmission to the spacecraft. To validate the core signal chain architecture, particularly the analog-to-digital conversion, FPGA-based processing, and Ethernet data transmission, a dedicated technology demonstrator, AXIS-TAP (ADC Testing and Acquisition Platform), has been designed and is currently in fabrication. AXIS-TAP employs commercial equivalents of radiation-tolerant components (FPGA, ADCs, Ethernet PHY) and interfaces directly with the STA Archon benchtop readout system, enabling simultaneous image acquisition from both systems to validate that the flight-like architecture achieves equivalent or superior noise performance. This paper presents the FEE architectural framework, the AXIS-TAP demonstrator design, and the design principles that enable scalability to future soft X-ray missions with similar detector requirements. Performance validation results will be reported upon completion of AXIS-TAP system integration and testing.

astro-ph.IM↗

arXiv2026

Output-Stage Design Optimization for High-Sensitivity SiSeRO CCDs and SiSeRO Active Pixel Sensors

The Single electron Sensitive Read Out (SiSeRO) technology is a new device class designed to support the needs of future X-ray and optical astronomical telescopes that will require fast, low-noise, megapixel spectro-imagers. Developed at MIT Lincoln Laboratory, in collaboration with Stanford University and MIT, the first generation SiSeRO-CCD (charge-coupled device) prototypes achieved a charge/current conversion gain of 700$-$800 pA per electron, an equivalent noise charge (ENC) of around 3.5 electrons root mean square (RMS), and a full width half maximum (FWHM) energy resolution of approximately 130 eV at 5.9 keV at a readout speed of 625 kpix/s. Utilizing Repetitive Non-Destructive Readout (RNDR), these same devices also demonstrated sub-electron noise performance (ENC$<$0.5 electrons RMS) at a readout speed of 10 kpix/s. We present the results of device simulations for next-generation SiSeRO CCD output stages that optimize the sensing transistor and its internal gate geometry to enhance noise and speed performance. Further, the goal is to develop a SiSeRO active pixel sensor (APS) that combines the proven X-ray performance of CCDs with the architectural advantages of an APS. Enabling this requires substantial design updates, for example, incorporating two SiSeRO amplifiers side by side on each pixel and shuffling the charge between them to support RNDR. We discuss our device simulation framework and design parameter optimization in the first-generation SiSeRO devices.

astro-ph.IM↗

arXiv2026

The High-Speed FPGA Readout System for the Advanced X-ray Imaging Satellite (AXIS)

The Advanced X-ray Imaging Satellite (AXIS) is a Probe-class mission concept designed to deliver arcsecond spatial resolution, high-sensitivity spectral imaging across the 0.3-10 keV band. The X-ray Astronomy and Observational Cosmology (XOC) Group at Stanford, in collaboration with the MIT Kavli Institute (MKI) and MIT Lincoln Laboratory (MIT-LL), is developing the AXIS X-ray camera, including both the detector and the front-end readout electronics required to meet the mission's demanding performance goals. The telescope's focal plane detector consists of four 1440x1440 pixel charge-coupled devices (CCDs) developed by MIT-LL, each featuring 16 parallel output channels. These outputs are amplified by a high-speed, low-power, low-noise application-specific integrated circuit (ASIC) - the Multi-Channel Readout Chip (MCRC) - developed at Stanford. Following amplification, the analog signals are digitized and processed to construct a pixel array, prior to event detection. Here, we present the field-programmable gate array (FPGA) architecture developed to enable high-speed, parallelized readout of these CCD channels. The FPGA samples 16 analog-to-digital converter (ADC) channels at 50 MHz, performs preprocessing of pixel data, which is then streamed via User Datagram Protocol (UDP) over a 1 Gb Ethernet link to the back-end system for event reconstruction. Our design demonstrates the goal readout performance for AXIS (20 frames per second) and provides a framework for future high-throughput X-ray observatories.

astro-ph.IM↗

arXiv2026

First results for second generation SiSeRO CCD devices

The Astro2020 Decadal recommended the development of a suite of next generation astronomical observatories spanning the X-ray to near-IR spectrum. These programs require fast, extremely low noise detectors to fulfill their science goals. To address this technology gap, Stanford X-ray Astronomy and Observational Cosmology (XOC) group, MIT Lincoln Laboratory (MIT-LL), and MIT Kavli Institute (MKI) are advancing Single electron Sensitive Read Out (SiSeRO), a multiband detector technology capable of achieving substantially sub-electron noise via Repetitive Non-Destructive Readout (RNDR). We present initial results for our second generation SiSeRO CCDs. We also discuss our test bed, including a readout electronics system capable of accommodating all second-generation SiSeRO CCD variants utilizing the XOC-designed Multi-Channel Readout Chip (MCRC) ASIC.

astro-ph.IM↗

arXiv2025

Development and testing of integrated readout electronics for next generation SiSeRO (Single electron Sensitive Read Out) devices

The first generation of Single electron Sensitive Read Out (SiSeRO) amplifiers, employed as on-chip charge detectors for charge-coupled devices (CCDs) have demonstrated excellent noise and spectral performance: a responsivity of around 800 pA per electron, an equivalent noise charge (ENC) of 3.2 electrons root mean square (RMS), and a full width half maximum (FWHM) energy resolution of 130 eV at 5.9 keV for a readout speed of 625 Kpixel/s. Repetitive Non Destructive Readout (RNDR) has also been demonstrated with these devices, achieving an improved ENC performance of 0.36 electrons RMS after 200 RNDR cycles. In order to mature this technology further, Stanford University, in collaboration with MIT Kavli Institute and MIT Lincoln Laboratory, are developing new SiSeRO detectors with improved geometries that should enable greater responsivity and improved noise performance. These include CCD devices employing arrays of SiSeRO amplifiers to optimize high speed, low noise RNDR readout and a proof-of-concept SiSeRO active pixel sensor (APS). To read out these devices, our team has developed a compact, 8-channel, fast, low noise, low power application specific integrated circuit (ASIC) denoted the Multi-Channel Readout Chip (MCRC) that includes an experimental drain current readout mode intended for SiSeRO devices. In this paper, we present results from the first tests of SiSeRO CCD devices operating with MCRC readout, and our designs for next generation SiSeRO devices.

astro-ph.IM↗

arXiv2025

Design, development, and commissioning of a flexible test setup for the AXIS prototype detector

The Advanced X-ray Imaging Satellite (AXIS) is one of two candidate mission concepts selected for Phase-A study for the new NASA Astrophysics Probe Explorer (APEX) mission class, with a planned launch in 2032. The X-ray camera for AXIS is under joint development by the X-ray Astronomy and Observational Cosmology (XOC) Group at Stanford, the MIT Kavli Institute (MKI), and MIT Lincoln Laboratory (MIT-LL). To accelerate development efforts and meet the AXIS mission requirements, XOC has developed a twin beamline testing system, capable of providing the necessary performance, flexibility, and robustness. We present design details, simulations, and performance results for the newer of the two beamlines, constructed and optimized to test and characterize the first full-size MIT-LL AXIS prototype detectors, operating with the Stanford-developed Multi-Channel Readout Chip (MCRC) integrated readout electronics system. The XOC X-ray beamline design is forward-looking and flexible, with a modular structure adaptable to a wide range of detector technologies identified by the Great Observatories Maturation Program (GOMAP) that span the X-ray to near-infrared wavelengths.

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arXiv2024

Focal Plane of the Arcus Probe X-Ray Spectrograph

The Arcus Probe mission concept provides high-resolution soft X-ray and UV spectroscopy to reveal feedback-driven structure and evolution throughout the universe with an agile response capability ideal for probing the physics of time-dependent phenomena. The X-ray Spectrograph (XRS) utilizes two nearly identical CCD focal planes to detect and record X-ray photons from the dispersed spectra and zero-order of the critical angle transmission gratings. In this paper we describe the Arcus focal plane instrument and the CCDs, including laboratory performance results, which meet observatory requirements.

astro-ph.IM↗

arXiv2024

X-ray spectral performance of the Sony IMX290 CMOS sensor near Fano limit after a per-pixel gain calibration

The advent of back-illuminated complementary metal-oxide-semiconductor (CMOS) sensors and their well-known advantages over charge-coupled devices (CCDs) make them an attractive technology for future X-ray missions. However, numerous challenges remain, including improving their depletion depth and identifying effective methods to calculate per-pixel gain conversion. We have tested a commercial Sony IMX290LLR CMOS sensor under X-ray light using an $^{55}$Fe radioactive source and collected X-ray photons for $\sim$15 consecutive days under stable conditions at regulated temperatures of 21{\deg}C and 26{\deg}C. At each temperature, the data set contained enough X-ray photons to produce one spectrum per pixel consisting only of single-pixel events. We determined the gain dispersion of its 2.1 million pixels using the peak fitting and the Energy Calibration by Correlation (ECC) methods. We measured a gain dispersion of 0.4\% at both temperatures and demonstrated the advantage of the ECC method in the case of spectra with low statistics. The energy resolution at 5.9 keV after the per-pixel gain correction is improved by $\gtrsim$10 eV for single-pixel and all event spectra, with single-pixel event energy resolution reaching $123.6\pm 0.2$ eV, close to the Fano limit of silicon sensors at room temperature. Finally, our long data acquisition demonstrated the excellent stability of the detector over more than 30 days under a flux of $10^4$ photons per second.

physics.ins-det↗

arXiv2024

Demonstrating sub-electron noise performance in Single electron Sensitive Readout (SiSeRO) devices

Single electron Sensitive Read Out (SiSeRO) is a novel on-chip charge detection technology that can, in principle, provide significantly greater responsivity and improved noise performance than traditional charge coupled device (CCD) readout circuitry. The SiSeRO, developed by MIT Lincoln Laboratory, uses a p-MOSFET transistor with a depleted back-gate region under the transistor channel; as charge is transferred into the back gate region, the transistor current is modulated. With our first generation SiSeRO devices, we previously achieved a responsivity of around 800 pA per electron, an equivalent noise charge (ENC) of 4.5 electrons root mean square (RMS), and a full width at half maximum (FWHM) spectral resolution of 130 eV at 5.9 keV, at a readout speed of 625 Kpixel/s and for a detector temperature of 250 K. Importantly, since the charge signal remains unaffected by the SiSeRO readout process, we have also been able to implement Repetitive Non-Destructive Readout (RNDR), achieving an improved ENC performance. In this paper, we demonstrate sub-electron noise sensitivity with these devices, utilizing an enhanced test setup optimized for RNDR measurements, with excellent temperature control, improved readout circuitry, and advanced digital filtering techniques. We are currently fabricating new SiSeRO detectors with more sensitive and RNDR-optimized amplifier designs, which will help mature the SiSeRO technology in the future and eventually lead to the pathway to develop active pixel sensor (APS) arrays using sensitive SiSeRO amplifiers on each pixel. Active pixel devices with sub-electron sensitivity and fast readout present an exciting option for next generation, large area astronomical X-ray telescopes requiring fast, low-noise megapixel imagers.

astro-ph.IM↗

arXiv2024

X-ray speed reading with the MCRC: prototype success and next generation upgrades

The Advanced X-ray Imaging Satellite (AXIS) is a NASA probe class mission concept designed to deliver arcsecond resolution with an effective area ten times that of Chandra (at launch). The AXIS focal plane features an MIT Lincoln Laboratory (MIT-LL) X-ray charge-coupled device (CCD) detector working in conjunction with an application specific integrated circuit (ASIC), denoted the Multi-Channel Readout Chip (MCRC). While this readout ASIC targets the AXIS mission, it is applicable to a range of potential X-ray missions with comparable readout requirements. Designed by the X-ray astronomy and Observational Cosmology (XOC) group at Stanford University, the MCRC ASIC prototype (MCRC-V1.0) uses a 350 nm technology node and provides 8 channels of high speed, low noise, low power consumption readout electronics. Each channel implements a current source to bias the detector output driver, a preamplifier to provide gain, and an output buffer to interface directly to an analog-to-digital (ADC) converter. The MCRC-V1 ASIC exhibits comparable performance to our best discrete electronics implementations, but with ten times less power consumption and a fraction of the footprint area. In a total ionizing dose (TID) test, the chip demonstrated a radiation hardness equal or greater to 25 krad, confirming the suitability of the process technology and layout techniques used in its design. The next iteration of the ASIC (MCRC-V2) will expand the channel count and extend the interfaces to external circuits, advancing its readiness as a readout-on-a-chip solution for next generation X-ray CCD-like detectors. This paper summarizes our most recent characterization efforts, including the TID radiation campaign and results from the first operation of the MCRC ASIC in combination with a representative MIT-LL CCD.

astro-ph.IM↗

arXiv2024

Continued developments in X-ray speed reading: fast, low noise readout for next-generation wide-field imagers

Future strategic X-ray astronomy missions will require unprecedentedly sensitive wide-field imagers providing high frame rates, low readout noise and excellent soft energy response. To meet these needs, our team is employing a multi-pronged approach to advance several key areas of technology. Our first focus is on advanced readout electronics, specifically integrated electronics, where we are collaborating on the VERITAS readout chip for the Athena Wide Field Imager, and have developed the Multi-Channel Readout Chip (MCRC), which enables fast readout and high frame rates for MIT-LL JFET (junction field effect transistor) CCDs. Second, we are contributing to novel detector development, specifically the SiSeRO (Single electron Sensitive Read Out) devices fabricated at MIT Lincoln Laboratory, and their advanced readout, to achieve sub-electron noise performance. Hardware components set the stage for performance, but their efficient utilization relies on software and algorithms for signal and event processing. Our group is developing digital waveform filtering and AI methods to augment detector performance, including enhanced particle background screening and improved event characterization. All of these efforts make use of an efficient, new X-ray beamline facility at Stanford, where components and concepts can be tested and characterized.

astro-ph.IM↗

arXiv2024

Curved detectors for future X-ray astrophysics missions

Future X-ray astrophysics missions will survey large areas of the sky with unparalleled sensitivity, enabled by lightweight, high-resolution optics. These optics inherently produce curved focal surfaces with radii as small as 2 m, requiring a large area detector system that closely conforms to the curved focal surface. We have embarked on a project using a curved charge-coupled device (CCD) detector technology developed at MIT Lincoln Laboratory to provide large-format, curved detectors for such missions, improving performance and simplifying design. We present the current status of this work, which aims to curve back-illuminated, large-format (5 cm x 4 cm) CCDs to 2.5-m radius and confirm X-ray performance. We detail the design of fixtures and the curving process, and present intial results on curving bare silicon samples and monitor devices and characterizing the surface geometric accuracy. The tests meet our accuracy requirement of <5 $\mu$m RMS surface non-conformance for samples of similar thickness to the functional detectors. We finally show X-ray performance measurements of planar CCDs that will serve as a baseline to evaluate the curved detectors. The detectors exhibit low noise, good charge-transfer efficiency, and excellent, uniform spectroscopic performance, including in the important soft X-ray band.

astro-ph.IM↗

arXiv2023

The high-speed X-ray camera on AXIS

AXIS is a Probe-class mission concept that will provide high-throughput, high-spatial-resolution X-ray spectral imaging, enabling transformative studies of high-energy astrophysical phenomena. To take advantage of the advanced optics and avoid photon pile-up, the AXIS focal plane requires detectors with readout rates at least 20 times faster than previous soft X-ray imaging spectrometers flying aboard missions such as Chandra and Suzaku, while retaining the low noise, excellent spectral performance, and low power requirements of those instruments. We present the design of the AXIS high-speed X-ray camera, which baselines large-format MIT Lincoln Laboratory CCDs employing low-noise pJFET output amplifiers and a single-layer polysilicon gate structure that allows fast, low-power clocking. These detectors are combined with an integrated high-speed, low-noise ASIC readout chip from Stanford University that provides better performance than conventional discrete solutions at a fraction of their power consumption and footprint. Our complementary front-end electronics concept employs state of the art digital video waveform capture and advanced signal processing to deliver low noise at high speed. We review the current performance of this technology, highlighting recent improvements on prototype devices that achieve excellent noise characteristics at the required readout rate. We present measurements of the CCD spectral response across the AXIS energy band, augmenting lab measurements with detector simulations that help us understand sources of charge loss and evaluate the quality of the CCD backside passivation technique. We show that our technology is on a path that will meet our requirements and enable AXIS to achieve world-class science.

astro-ph.IM↗

arXiv2023

Demonstrating repetitive non-destructive readout (RNDR) with SiSeRO devices

We demonstrate so-called repetitive non-destructive readout (RNDR) for the first time on a Single electron Sensitive Readout (SiSeRO) device. SiSeRO is a novel on-chip charge detector output stage for charge-coupled device (CCD) image sensors, developed at MIT Lincoln Laboratory. This technology uses a p-MOSFET transistor with a depleted internal gate beneath the transistor channel. The transistor source-drain current is modulated by the transfer of charge into the internal gate. RNDR was realized by transferring the signal charge non-destructively between the internal gate and the summing well (SW), which is the last serial register. The advantage of the non-destructive charge transfer is that the signal charge for each pixel can be measured at the end of each transfer cycle and by averaging for a large number of measurements ($\mathrm{N_{cycle}}$), the total noise can be reduced by a factor of 1/$\mathrm{\sqrt{N_{cycle}}}$. In our experiments with a prototype SiSeRO device, we implemented nine ($\mathrm{N_{cycle}}$ = 9) RNDR cycles, achieving around 2 electron readout noise (equivalent noise charge or ENC) with spectral resolution close to the fano limit for silicon at 5.9 keV. These first results are extremely encouraging, demonstrating successful implementation of the RNDR technique in SiSeROs. They also lay foundation for future experiments with more optimized test stands (better temperature control, larger number of RNDR cycles, RNDR-optimized SiSeRO devices) which should be capable of achieving sub-electron noise sensitivities. This new device class presents an exciting technology for next generation astronomical X-ray telescopes requiring very low-noise spectroscopic imagers. The sub-electron sensitivity also adds the capability to conduct in-situ absolute calibration, enabling unprecedented characterization of the low energy instrument response.

astro-ph.IM↗

arXiv2023

Improved noise performance from the next-generation buried-channel p-Mosfet SiSeROs

The Single electron Sensitive Read Out (SiSeRO) is a novel on-chip charge detector output stage for charge-coupled device (CCD) image sensors. Developed at MIT Lincoln Laboratory, this technology uses a p-MOSFET transistor with a depleted internal gate beneath the transistor channel. The transistor source-drain current is modulated by the transfer of charge into the internal gate. At Stanford, we have developed a readout module based on the drain current of the on-chip transistor to characterize the device. In our earlier work, we characterized a number of first prototype SiSeROs with the MOSFET transistor channels at the surface layer. An equivalent noise charge (ENC) of around 15 electrons root mean square (RMS) was obtained. In this work, we examine the first buried-channel SiSeRO. We have achieved substantially improved noise performance of around 4.5 electrons root mean square (RMS) and a full width half maximum (FWHM) energy resolution of 132 eV at 5.9 keV, for a readout speed of 625 kpixel/s. We also discuss how digital filtering techniques can be used to further improve the SiSeRO noise performance. Additional measurements and device simulations will be essential to further mature the SiSeRO technology. This new device class presents an exciting new technology for the next-generation astronomical X-ray telescopes requiring fast, low-noise, radiation-hard megapixel imagers with moderate spectroscopic resolution.

astro-ph.IM↗

arXiv2022

Single electron Sensitive Readout (SiSeRO) X-ray detectors: Technological progress and characterization

Single electron Sensitive Read Out (SiSeRO) is a novel on-chip charge detector output stage for charge-coupled device (CCD) image sensors. Developed at MIT Lincoln Laboratory, this technology uses a p-MOSFET transistor with a depleted internal gate beneath the transistor channel. The transistor source-drain current is modulated by the transfer of charge into the internal gate. At Stanford, we have developed a readout module based on the drain current of the on-chip transistor to characterize the device. Characterization was performed for a number of prototype sensors with different device architectures, e.g. location of the internal gate, MOSFET polysilicon gate structure, and location of the trough in the internal gate with respect to the source and drain of the MOSFET (the trough is introduced to confine the charge in the internal gate). Using a buried-channel SiSeRO, we have achieved a charge/current conversion gain of >700 pA per electron, an equivalent noise charge (ENC) of around 6 electrons root mean square (RMS), and a full width half maximum (FWHM) of approximately 140 eV at 5.9 keV at a readout speed of 625 Kpixel/s. In this paper, we discuss the SiSeRO working principle, the readout module developed at Stanford, and the characterization test results of the SiSeRO prototypes. We also discuss the potential to implement Repetitive Non-Destructive Readout (RNDR) with these devices and the preliminary results which can in principle yield sub-electron ENC performance. Additional measurements and detailed device simulations will be essential to mature the SiSeRO technology. However, this new device class presents an exciting technology for next generation astronomical X-ray telescopes requiring fast, low-noise, radiation hard megapixel imagers with moderate spectroscopic resolution.

astro-ph.IM↗