arXiv subjects

Guangyuan Hu

Publications and source records attributed to Guangyuan Hu.

12 recordsLinked to original sources

arXiv2024

Random and Safe Cache Architecture to Defeat Cache Timing Attacks

Caches have been exploited to leak secret information due to the different times they take to handle memory accesses. Cache timing attacks include non-speculative cache side and covert channel attacks and cache-based speculative execution attacks. We first present a systematic view of the attack and defense space and show that no existing defense has addressed all cache timing attacks, which we do in this paper. We propose Random and Safe (RaS) cache architectures to decorrelate cache state changes from memory requests. RaS fills the cache with ``safe'' cache lines that are likely to be used in the future, rather than with demand-fetched, security-sensitive lines. RaS lifts the restriction on cache fills for accesses that become safe when speculative execution is resolved and authorized. Our RaS-Spec design against cache-based speculative execution attacks has a low 3.8% average performance overhead. RaS+ variants against both speculative and non-speculative attacks have security-performance trade-offs ranging from 7.9% to 45.2% average overhead.

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arXiv2023

Web of Science Core Collection's coverage expansion:The forgotten Arts & Humanities Citation Index?

The expansion of Web of Science Core Collection (WoSCC) over the recent years has partially accounted for the "norm" of growth of research output in many bibliometric analysis studies. However, the expansion patterns of different citation indexes may be different, which may benefit some disciplines but hinder others. Utilizing Science Citation Index Expanded (SCIE), Social Sciences Citation Index (SSCI), and Arts & Humanities Citation Index (A&HCI), this study attempts to elaborate on WoSCC's coverage expansion patterns among these three databases from 2001 to 2020. Results show that different from SCIE/SSCI, both the annual publication volumes in the A&HCI database and all A&HCI journals have remained relatively stagnant in all document types considered scenario or have gained relatively slight increases in only citable items considered scenario. Although the number of A&HCI journals also has increased remarkably, the average journal publication volume of A&HCI journals has decreased gradually if all document types are considered or kept relatively stagnant when citable items only are considered. Besides, the A&HCI database has ceased the systematic index of individually selected items from SCIE/SSCI journals since 2018. The study finally discusses the possible causes and consequences of the unbalanced expansion of WoSCC's different citation indexes.

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arXiv2023

Protecting Cache States Against Both Speculative Execution Attacks and Side-channel Attacks

Hardware caches are essential performance optimization features in modern processors to reduce the effective memory access time. Unfortunately, they are also the prime targets for attacks on computer processors because they are high-bandwidth and reliable side or covert channels for leaking secrets. Conventional cache timing attacks typically leak secret encryption keys, while recent speculative execution attacks typically leak arbitrary illegally-obtained secrets through cache timing channels. While many hardware defenses have been proposed for each class of attacks, we show that those for conventional (non-speculative) cache timing channels do not work for all speculative execution attacks, and vice versa. We maintain that a cache is not secure unless it can defend against both of these major attack classes. We propose a new methodology and framework for covering such relatively large attack surfaces to produce a Speculative and Timing Attack Resilient (STAR) cache subsystem. We use this to design two comprehensive secure cache architectures, STAR-FARR and STAR-NEWS, that have very low performance overheads of 5.6% and 6.8%, respectively. To the best of our knowledge, these are the first secure cache designs that cover both non-speculative cache side channels and cache-based speculative execution attacks. Our methodology can be used to compose and check other secure cache designs. It can also be extended to other attack classes and hardware systems. Additionally, we also highlight the intrinsic security and performance benefits of a randomized cache like a real Fully Associative cache with Random Replacement (FARR) and a lower-latency, speculation-aware version (NEWS).

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arXiv2023

SoK: Hardware Defenses Against Speculative Execution Attacks

Speculative execution attacks leverage the speculative and out-of-order execution features in modern computer processors to access secret data or execute code that should not be executed. Secret information can then be leaked through a covert channel. While software patches can be installed for mitigation on existing hardware, these solutions can incur big performance overhead. Hardware mitigation is being studied extensively by the computer architecture community. It has the benefit of preserving software compatibility and the potential for much smaller performance overhead than software solutions. This paper presents a systematization of the hardware defenses against speculative execution attacks that have been proposed. We show that speculative execution attacks consist of 6 critical attack steps. We propose defense strategies, each of which prevents a critical attack step from happening, thus preventing the attack from succeeding. We then summarize 20 hardware defenses and overhead-reducing features that have been proposed. We show that each defense proposed can be classified under one of our defense strategies, which also explains why it can thwart the attack from succeeding. We discuss the scope of the defenses, their performance overhead, and the security-performance trade-offs that can be made.

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arXiv2021

Smartphone Impostor Detection with Behavioral Data Privacy and Minimalist Hardware Support

Impostors are attackers who take over a smartphone and gain access to the legitimate user's confidential and private information. This paper proposes a defense-in-depth mechanism to detect impostors quickly with simple Deep Learning algorithms, which can achieve better detection accuracy than the best prior work which used Machine Learning algorithms requiring computation of multiple features. Different from previous work, we then consider protecting the privacy of a user's behavioral (sensor) data by not exposing it outside the smartphone. For this scenario, we propose a Recurrent Neural Network (RNN) based Deep Learning algorithm that uses only the legitimate user's sensor data to learn his/her normal behavior. We propose to use Prediction Error Distribution (PED) to enhance the detection accuracy. We also show how a minimalist hardware module, dubbed SID for Smartphone Impostor Detector, can be designed and integrated into smartphones for self-contained impostor detection. Experimental results show that SID can support real-time impostor detection, at a very low hardware cost and energy consumption, compared to other RNN accelerators.

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arXiv2020

New Models for Understanding and Reasoning about Speculative Execution Attacks

Spectre and Meltdown attacks and their variants exploit hardware performance optimization features to cause security breaches. Secret information is accessed and leaked through covert or side channels. New attack variants keep appearing and we do not have a systematic way to capture the critical characteristics of these attacks and evaluate why they succeed or fail. In this paper, we provide a new attack-graph model for reasoning about speculative execution attacks. We model attacks as ordered dependency graphs, and prove that a race condition between two nodes can occur if there is a missing dependency edge between them. We define a new concept, "security dependency", between a resource access and its prior authorization operation. We show that a missing security dependency is equivalent to a race condition between authorization and access, which is a root cause of speculative execution attacks. We show detailed examples of how our attack graph models the Spectre and Meltdown attacks, and is generalizable to all the attack variants published so far. This attack model is also very useful for identifying new attacks and for generalizing defense strategies. We identify several defense strategies with different performance-security tradeoffs. We show that the defenses proposed so far all fit under one of our defense strategies. We also explain how attack graphs can be constructed and point to this as promising future work for tool designers.

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arXiv2020

Smartphone Impostor Detection with Built-in Sensors and Deep Learning

In this paper, we show that sensor-based impostor detection with deep learning can achieve excellent impostor detection accuracy at lower hardware cost compared to past work on sensor-based user authentication (the inverse problem) which used more conventional machine learning algorithms. While these methods use other smartphone users' sensor data to build the (user, non-user) classification models, we go further to show that using only the legitimate user's sensor data can still achieve very good accuracy while preserving the privacy of the user's sensor data (behavioral biometrics). For this use case, a key contribution is showing that the detection accuracy of a Recurrent Neural Network (RNN) deep learning model can be significantly improved by comparing prediction error distributions. This requires generating and comparing empirical probability distributions, which we show in an efficient hardware design. Another novel contribution is in the design of SID (Smartphone impostor Detection), a minimalist hardware accelerator that can be integrated into future smartphones for efficient impostor detection for different scenarios. Our SID module can implement many common Machine Learning and Deep Learning algorithms. SID is also scalable in parallelism and performance and easy to program. We show an FPGA prototype of SID, which can provide more than enough performance for real-time impostor detection, with very low hardware complexity and power consumption (one to two orders of magnitude less than related performance-oriented FPGA accelerators). We also show that the FPGA implementation of SID consumes 64.41X less energy than an implementation using the CPU with a GPU.

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arXiv2020

Funding information in Web of Science: An updated overview

Despite the limitations of funding acknowledgment (FA) data in Web of Science (WoS), studies using FA information have increased rapidly over the last several years. Considering this WoS'recent practice of updating funding data, this paper further investigates the characteristics and distribution of FA data in four WoS journal citation indexes. The research reveals that FA information coverage variances persist cross all four citation indexes by time coverage, language and document type. Our evidence suggests an improvement in FA information collection in humanity and social science research. Departing from previous studies, we argue that FA text (FT) alone no longer seems an appropriate field to retrieve and analyze funding information, since a substantial number of documents only report funding agency or grant number information in respective fields. Articles written in Chinese have a higher FA presence rate than other non-English WoS publications. This updated study concludes with a discussion of new findings and practical guidance for the future retrieval and analysis of funded research.

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arXiv2019

Power-Grid Controller Anomaly Detection with Enhanced Temporal Deep Learning

Controllers of security-critical cyber-physical systems, like the power grid, are a very important class of computer systems. Attacks against the control code of a power-grid system, especially zero-day attacks, can be catastrophic. Earlier detection of the anomalies can prevent further damage. However, detecting zero-day attacks is extremely challenging because they have no known code and have unknown behavior. Furthermore, if data collected from the controller is transferred to a server through networks for analysis and detection of anomalous behavior, this creates a very large attack surface and also delays detection. In order to address this problem, we propose Reconstruction Error Distribution (RED) of Hardware Performance Counters (HPCs), and a data-driven defense system based on it. Specifically, we first train a temporal deep learning model, using only normal HPC readings from legitimate processes that run daily in these power-grid systems, to model the normal behavior of the power-grid controller. Then, we run this model using real-time data from commonly available HPCs. We use the proposed RED to enhance the temporal deep learning detection of anomalous behavior, by estimating distribution deviations from the normal behavior with an effective statistical test. Experimental results on a real power-grid controller show that we can detect anomalous behavior with high accuracy (>99.9%), nearly zero false positives and short (<360ms) latency.

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arXiv2018

Long live the scientists: Tracking the scientific fame of great minds in physics

This study utilizes global digitalized books and articles to examine the scientific fame of the most influential physicists. Our research reveals that the greatest minds are gone but not forgotten. Their scientific impacts on human history have persisted for centuries. We also find evidence in support of own-group fame preference, i.e., that the scientists have greater reputations in their home countries or among scholars sharing the same languages. We argue that, when applied appropriately, Google Books and Ngram Viewer can serve as promising tools for altmetrics, providing a more comprehensive picture of the impacts scholars and their achievements have made beyond academia.

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arXiv2018

Missing author address information in Web of Science-An explorative study

Bibliometric analysis is increasingly used to evaluate and compare research performance across geographical regions. However, the problem of missing information from author addresses has not attracted sufficient attention from scholars and practitioners. This study probes the missing data problem in the three core journal citation databases of Web of Science (WoS). Our findings reveal that from 1900 to 2015 over one-fifth of the publications indexed in WoS have completely missing information from the address field. The magnitude of the problem varies greatly among time periods, citation databases, document types, and publishing languages. The problem is especially serious for research in the sciences and social sciences published before the early 1970s and remains significant for recent publications in the arts and humanities. Further examinations suggest that many records with completely missing address information do not represent scholarly research. Full-text scanning of a random sample reveals that about 40% of the articles have some address information that is not indexed in WoS. This study also finds that the problem of partially missing address information for U.S. research has diminished dramatically since 1998. The paper ends by providing some discussion and tentative remedies.

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arXiv2016

Funding acknowledgment analysis:Queries and Caveats

Thomson Reuters' Web of Science (WoS) began systematically collecting acknowledgment information in August 2008. Since then, bibliometric analysis of funding acknowledgment (FA) has been growing and has aroused intense interest and attention from both academia and policy makers. Examining the distribution of FA by citation index database, by language, and by acknowledgment type, we noted coverage limitations and potential biases in each analysis. We argue that in spite of its great value, bibliometric analysis of FA should be used with caution.

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