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Haibo Chen

Publications and source records attributed to Haibo Chen.

At least 109 records · Page 6Linked to original sources

Simple restricted modules over the $N=1$ Ramond algebra as weak modules for vertex operator superalgebras

In the present paper, a class of new simple modules over the $N=1$ Ramond algebra are constructed, which are induced from simple modules over some finite dimensional solvable Lie superalgebras. These new modules are simple restricted modules over the $N=1$ Ramond algebra. Combined with the result in \cite{L1}, a classification of simple weak $ψ$-twisted $\bar W(0,c)$-modules under certain conditions is also given. At last, some examples of simple restricted $N=1$ Ramond modules as various versions of Whittaker modules are presented (classical Whittaker modules were studied in \cite{LPX}).

math.QA↗

Harish-Chandra modules over the high rank $W$-algebra $W(2,2)$

In this paper, using the theory of $\A$-cover developed in \cite{B1,BF1}, we completely classify all simple Harish-Chandra modules over the high rank $W$-algebra $W(2,2)$. As a byproduct, we obtain the classification of simple Harish-Chandra modules over the classical $W$-algebra $W(2,2)$ studied in \cite{LGZ,CLW,GLZ1}.

math.RT↗

MicroAST: Towards Super-Fast Ultra-Resolution Arbitrary Style Transfer

Arbitrary style transfer (AST) transfers arbitrary artistic styles onto content images. Despite the recent rapid progress, existing AST methods are either incapable or too slow to run at ultra-resolutions (e.g., 4K) with limited resources, which heavily hinders their further applications. In this paper, we tackle this dilemma by learning a straightforward and lightweight model, dubbed MicroAST. The key insight is to completely abandon the use of cumbersome pre-trained Deep Convolutional Neural Networks (e.g., VGG) at inference. Instead, we design two micro encoders (content and style encoders) and one micro decoder for style transfer. The content encoder aims at extracting the main structure of the content image. The style encoder, coupled with a modulator, encodes the style image into learnable dual-modulation signals that modulate both intermediate features and convolutional filters of the decoder, thus injecting more sophisticated and flexible style signals to guide the stylizations. In addition, to boost the ability of the style encoder to extract more distinct and representative style signals, we also introduce a new style signal contrastive loss in our model. Compared to the state of the art, our MicroAST not only produces visually superior results but also is 5-73 times smaller and 6-18 times faster, for the first time enabling super-fast (about 0.5 seconds) AST at 4K ultra-resolutions. Code is available at https://github.com/EndyWon/MicroAST.

cs.CV↗

Positive solutions for a coupled nonlinear Kirchhoff-type system with vanishing potentials

In this paper, we consider the strongly coupled nonlinear Kirchhoff-type system with vanshing potentials: \begin{equation*}\begin{cases} -\left(a_1+b_1\int_{\mathbb{R}^3}|\nabla u|^2\dx\right)Δu+λV(x)u=\fracα{α+β}|u|^{α-2}u|v|^β,&x\in\mathbb{R}^3,\\ -\left(a_2+b_2\int_{\mathbb{R}^3}|\nabla v|^2\dx\right)Δv+λW(x)v=\fracβ{α+β}|u|^α|v|^{β-2}v,&x\in\mathbb{R}^3,\\ u,v\in \mathcal{D}^{1,2}(\R^3), \end{cases}\end{equation*} where $a_i>0$ are constants, $λ,b_i>0$ are parameters for $i=1,2$, $α,β>1$ and $α+β\leqslant 4$, $V(x)$, $W(x)$ are nonnegative continuous potentials, the nonlinear term $F(x,u,v)=|u|^α|v|^β$ is not 4-superlinear at infinity. Such problem cannot be studied directly by standard variational methods, even by restricting the associated energy functional on the Nehari manifold, because Palais-Smale sequences may not be bounded. Combining some new detailed estimates with truncation technique, we obtain the existence of positive vector solutions for the above system when $b_1+b_2$ small and $λ$ large. Moreover, the asymptotic behavior of these vector solutions is also explored as $\textbf{b}=(b_1,b_2)\to \bf{0}$ and $λ\to\infty$. In particular, our results extend some known ones in previous papers that only deals with the case where $4<α+β<6$.

math.AP↗

No Provisioned Concurrency: Fast RDMA-codesigned Remote Fork for Serverless Computing

Serverless platforms essentially face a tradeoff between container startup time and provisioned concurrency (i.e., cached instances), which is further exaggerated by the frequent need for remote container initialization. This paper presents MITOSIS, an operating system primitive that provides fast remote fork, which exploits a deep codesign of the OS kernel with RDMA. By leveraging the fast remote read capability of RDMA and partial state transfer across serverless containers, MITOSIS bridges the performance gap between local and remote container initialization. MITOSIS is the first to fork over 10,000 new containers from one instance across multiple machines within a second, while allowing the new containers to efficiently transfer the pre-materialized states of the forked one. We have implemented MITOSIS on Linux and integrated it with FN, a popular serverless platform. Under load spikes in real-world serverless workloads, MITOSIS reduces the function tail latency by 89% with orders of magnitude lower memory usage. For serverless workflow that requires state transfer, MITOSIS improves its execution time by 86%.

cs.OS↗

KRCORE: a microsecond-scale RDMA control plane for elastic computing

We present KRCORE, an RDMA library with a microsecond-scale control plane on commodity RDMA hardware for elastic computing. KRCORE can establish a full-fledged RDMA connection within 10μs (hundreds or thousands of times faster than verbs), while only maintaining a (small) fixed-sized connection metadata at each node, regardless of the cluster scale. The key ideas include virtualizing pre-initialized kernel-space RDMA connections instead of creating one from scratch, and retrofitting advanced RDMA dynamic connected transport with static transport for both low connection overhead and high networking speed. Under load spikes, KRCORE can shorten the worker bootstrap time of an existing disaggregated key-value store (namely RACE Hashing) by 83%. In serverless computing (namely Fn), KRCORE can also reduce the latency for transferring data through RDMA by 99%.

cs.NI↗

DivSwapper: Towards Diversified Patch-based Arbitrary Style Transfer

Gram-based and patch-based approaches are two important research lines of style transfer. Recent diversified Gram-based methods have been able to produce multiple and diverse stylized outputs for the same content and style images. However, as another widespread research interest, the diversity of patch-based methods remains challenging due to the stereotyped style swapping process based on nearest patch matching. To resolve this dilemma, in this paper, we dive into the crux of existing patch-based methods and propose a universal and efficient module, termed DivSwapper, for diversified patch-based arbitrary style transfer. The key insight is to use an essential intuition that neural patches with higher activation values could contribute more to diversity. Our DivSwapper is plug-and-play and can be easily integrated into existing patch-based and Gram-based methods to generate diverse results for arbitrary styles. We conduct theoretical analyses and extensive experiments to demonstrate the effectiveness of our method, and compared with state-of-the-art algorithms, it shows superiority in diversity, quality, and efficiency.

cs.CV↗

New irreducible non-weight Virasoro modules from tensor products

In this paper, we present a class of non-weight Virasoro modules $\mathcal{M}\big(V,Ω(λ_0,α_0)\big)\otimes\bigotimes_{i=1}^mΩ(λ_i,α_i)$ where $Ω(λ_i,α_i)$ and $\mathcal{M}\big(V,Ω(λ_0,α_0)\big)$ are irreducible Virasoro modules defined in \cite{LZ2} and \cite{LZ} respectively. The necessary and sufficient conditions for $\mathcal{M}\big(V,Ω(λ_0,α_0)\big)\otimes\bigotimes_{i=1}^mΩ(λ_i,α_i)$ to be irreducible are obtained. Then we determine the necessary and sufficient conditions for two such irreducible Virasoro modules to be isomorphic. At last, we show that the irreducible modules in this class are new.

math.RT↗

Fast multipole boundary element method for the acoustic analysis of finite periodic structures

In this work, two fast multipole boundary element formulations for the linear time-harmonic acoustic analysis of finite periodic structures are presented. Finite periodic structures consist of a bounded number of unit cell replications in one or more directions of periodicity. Such structures can be designed to efficiently control and manipulate sound waves and are referred to as acoustic metamaterials or sonic crystals. Our methods subdivide the geometry into boxes which correspond to the unit cell. A boundary element discretization is applied and interactions between well separated boxes are approximated by a fast multipole expansion. Due to the periodicity of the underlying geometry, certain operators of the expansion become block Toeplitz matrices. This allows to express matrix-vector products as circular convolutions which significantly reduces the computational effort and the overall memory requirements. The efficiency of the presented techniques is shown based on an acoustic scattering problem. In addition, a study on the design of sound barriers is presented where the performance of a wall-like sound barrier is compared to the performance of two sonic crystal sound barriers.

math.NA↗

DuVisor: a User-level Hypervisor Through Delegated Virtualization

Today's mainstream virtualization systems comprise of two cooperative components: a kernel-resident driver that accesses virtualization hardware and a user-level helper process that provides VM management and I/O virtualization. However, this virtualization architecture has intrinsic issues in both security (a large attack surface) and performance. While there is a long thread of work trying to minimize the kernel-resident driver by offloading functions to user mode, they face a fundamental tradeoff between security and performance: more offloading may reduce the kernel attack surface, yet increase the runtime ring crossings between the helper process and the driver, and thus more performance cost. This paper explores a new design called delegated virtualization, which completely separates the control plane (the kernel driver) from the data plane (the helper process) and thus eliminates the kernel driver from runtime intervention. The resulting user-level hypervisor, called DuVisor, can handle all VM operations without trapping into the kernel once the kernel driver has done the initialization. DuVisor retrofits existing hardware virtualization support with a new delegated virtualization extension to directly handle VM exits, configure virtualization registers, manage the stage-2 page table and virtual devices in user mode. We have implemented the hardware extension on an open-source RISC-V CPU and built a Rust-based hypervisor atop the hardware. Evaluation on FireSim shows that DuVisor outperforms KVM by up to 47.96\% in a variety of real-world applications and significantly reduces the attack surface.

cs.OS↗

Asymmetry-aware Scalable Locking

The pursuit of power-efficiency is popularizing asymmetric multicore processors (AMP) such as ARM big.LITTLE, Apple M1 and recent Intel Alder Lake with big and little cores. However, we find that existing scalable locks fail to scale on AMP and cause collapses in either throughput or latency, or both, because their implicit assumption of symmetric cores no longer holds. To address this issue, we propose the first asymmetry-aware scalable lock named LibASL. LibASL provides a new lock ordering guided by applications' latency requirements, which allows big cores to reorder with little cores for higher throughput under the condition of preserving applications' latency requirements. Using LibASL only requires linking the applications with it and, if latency-critical, inserting few lines of code to annotate the coarse-grained latency requirement. We evaluate LibASL in various benchmarks including five popular databases on Apple M1. Evaluation results show that LibASL can improve the throughput by up to 5 times while precisely preserving the tail latency designated by applications.

cs.DC↗

Texture Reformer: Towards Fast and Universal Interactive Texture Transfer

In this paper, we present the texture reformer, a fast and universal neural-based framework for interactive texture transfer with user-specified guidance. The challenges lie in three aspects: 1) the diversity of tasks, 2) the simplicity of guidance maps, and 3) the execution efficiency. To address these challenges, our key idea is to use a novel feed-forward multi-view and multi-stage synthesis procedure consisting of I) a global view structure alignment stage, II) a local view texture refinement stage, and III) a holistic effect enhancement stage to synthesize high-quality results with coherent structures and fine texture details in a coarse-to-fine fashion. In addition, we also introduce a novel learning-free view-specific texture reformation (VSTR) operation with a new semantic map guidance strategy to achieve more accurate semantic-guided and structure-preserved texture transfer. The experimental results on a variety of application scenarios demonstrate the effectiveness and superiority of our framework. And compared with the state-of-the-art interactive texture transfer algorithms, it not only achieves higher quality results but, more remarkably, also is 2-5 orders of magnitude faster. Code is available at https://github.com/EndyWon/Texture-Reformer.

cs.CV↗

Polyjuice: High-Performance Transactions via Learned Concurrency Control

Concurrency control algorithms are key determinants of the performance of in-memory databases. Existing algorithms are designed to work well for certain workloads. For example, optimistic concurrency control (OCC) is better than two-phase-locking (2PL) under low contention, while the converse is true under high contention. To adapt to different workloads, prior works mix or switch between a few known algorithms using manual insights or simple heuristics. We propose a learning-based framework that instead explicitly optimizes concurrency control via offline training to maximize performance. Instead of choosing among a small number of known algorithms, our approach searches in a "policy space" of fine-grained actions, resulting in novel algorithms that can outperform existing algorithms by specializing to a given workload. We build Polyjuice based on our learning framework and evaluate it against several existing algorithms. Under different configurations of TPC-C and TPC-E, Polyjuice can achieve throughput numbers higher than the best of existing algorithms by 15% to 56%.

cs.DB↗

Multimodal Image-to-Image Translation via Mutual Information Estimation and Maximization

Multimodal image-to-image translation (I2IT) aims to learn a conditional distribution that explores multiple possible images in the target domain given an input image in the source domain. Conditional generative adversarial networks (cGANs) are often adopted for modeling such a conditional distribution. However, cGANs are prone to ignore the latent code and learn a unimodal distribution in conditional image synthesis, which is also known as the mode collapse issue of GANs. To solve the problem, we propose a simple yet effective method that explicitly estimates and maximizes the mutual information between the latent code and the output image in cGANs by using a deep mutual information neural estimator in this paper. Maximizing the mutual information strengthens the statistical dependency between the latent code and the output image, which prevents the generator from ignoring the latent code and encourages cGANs to fully utilize the latent code for synthesizing diverse results. Our method not only provides a new perspective from information theory to improve diversity for I2IT but also achieves disentanglement between the source domain content and the target domain style for free.

cs.CV↗

Normalized solutions to the fractional Kirchhoff equations with combined nonlinearities

In this paper, we study the existence and asymptotic properties of solutions to the following fractional Kirchhoff equation \begin{equation*} \left(a+b\int_{\mathbb{R}^{3}}|(-Δ)^{\frac{s}{2}}u|^{2}dx\right)(-Δ)^{s}u=λu+μ|u|^{q-2}u+|u|^{p-2}u \quad \hbox{in $\mathbb{R}^3$,} \end{equation*} with a prescribed mass \begin{equation*} \int_{\mathbb{R}^{3}}|u|^{2}dx=c^{2}, \end{equation*} where $s\in(0, 1)$, $a, b, c>0$, $2 0$ and $λ\in\mathbb{R}$ as a Lagrange multiplier. Under different assumptions on $q 0$ and $μ>0$, we prove some existence results about the normalized solutions. Our results extend the results of Luo and Zhang (Calc. Var. Partial Differential Equations 59, 1-35, 2020) to the fractional Kirchhoff equations. Moreover, we give some results about the behavior of the normalized solutions obtained above as $μ\rightarrow0^{+}$.

math.AP↗

Finite irreducible conformal modules over the Lie conformal superalgebra $\mathcal{S}(p)$

In the present paper, we introduce a class of infinite Lie conformal superalgebras $\mathcal{S}(p)$, which are closely related to Lie conformal algebras of extended Block type defined in \cite{CHS}. Then all finite non-trivial irreducible conformal modules over $\mathcal{S}(p)$ for $p\in\C^*$ are completely classified. As an application, we also present the classifications of finite non-trivial irreducible conformal modules over finite quotient algebras $\mathfrak{s}(n)$ for $n\geq1$ and $\mathfrak{sh}$ which is isomorphic to a subalgebra of Lie conformal algebra of $N=2$ superconformal algebra. Moreover, as a generalized version of $\mathcal{S}(p)$, the infinite Lie conformal superalgebras $\mathcal{GS}(p)$ are constructed, which have a subalgebra isomorphic to the finite Lie conformal algebra of $N=2$ superconformal algebra.

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A family of simple non-weight modules over the twisted $N=2$ superconformal algebra

We construct a class of non-weight modules over the twisted $N=2$ superconformal algebra $\T$. Let $\mathfrak{h}=\C L_0\oplus\C G_0$ be the Cartan subalgebra of $\T$, and let $\mathfrak{t}=\C L_0$ be the Cartan subalgebra of even part $\T_{\bar 0}$. These modules over $\T$ when restricted to the $\mathfrak{h}$ are free of rank $1$ or when restricted to the $\mathfrak{t}$ are free of rank $2$. We provide the sufficient and necessary conditions for those modules being simple, as well as giving the sufficient and necessary conditions for two $\T$-modules being isomorphic. We also compute the action of an automorphism on them. Moreover, based on the weighting functor introduced in \cite{N2}, a class of intermediate series modules $A_σ$ are obtained. As a byproduct, we give a sufficient condition for two $\T$-modules are not isomorphic.

math.RT↗

VSync: Push-Button Verification and Optimization for Synchronization Primitives on Weak Memory Models (Technical Report)

This technical report contains material accompanying our work with same title published at ASPLOS'21. We start in Sec. 1 with a detailed presentation of the core innovation of this work, Await Model Checking (AMC). The correctness proofs of AMC can be found in Sec. 2. Next, we discuss three study cases in Sec. 3, presenting bugs found and challenges encountered when applying VSync to existing code bases. Finally, in Sec. 4 we describe the setup details of our evaluation and report further experimental results.

cs.LO↗