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Hervé Paulino

Publications and source records attributed to Hervé Paulino.

9 recordsLinked to original sources

Parsley's Group Size Study

Parsley is a resilient group-based Distributed Hash Table that incorporates a preemptive peer relocation technique and a dynamic data sharding mechanism to enhance robustness and balance. In addition to the hard limits on group size, defined by minimum and maximum thresholds, Parsley introduces two soft limits that define a target interval for maintaining stable group sizes. These soft boundaries allow the overlay to take proactive measures to prevent violations of the hard limits, improving system stability under churn. This work provides an in-depth analysis of the rationale behind the parameter values adopted for Parsley's evaluation. Unlike related systems, which specify group size limits without justification, we conduct a systematic overlay characterization study to understand the effects of these parameters on performance and scalability. The study examines topology operations, the behavior of large groups, and the overall trade-offs observed, offering a grounded explanation for the chosen configuration values.

cs.DC↗

Sound Atomicity Inference for Data-Centric Synchronization

Data-Centric Concurrency Control (DCCC) shifts the reasoning about concurrency restrictions from control structures to data declaration. It is a high-level declarative approach that abstracts away from the actual concurrency control mechanism(s) in use. Despite its advantages, the practical use of DCCC is hindered by the fact that it may require many annotations and/or multiple implementations of the same method to cope with differently qualified parameters. Moreover, the existing DCCC solutions do not address the use of interfaces, precluding their use in most object-oriented programs. To overcome these limitations, in this paper we present AtomiS, a new DCCC model based on a rigorously defined type-sound programming language. Programming with AtomiS requires only (atomic)-qualifying types of parameters and return values in interface definitions, and of fields in class definitions. From this atomicity specification, a static analysis infers the atomicity constraints that are local to each method, considering valid only the method variants that are consistent with the specification, and performs code generation for all valid variants of each method. The generated code is then the target for automatic injection of concurrency control primitives, by means of the desired automatic technique and associated atomicity and deadlock-freedom guarantees, which can be plugged-into the model's pipeline. We present the foundations for the AtomiS analysis and synthesis, with formal guarantees that the generated program is well-typed and that it corresponds behaviourally to the original one. The proofs are mechanised in Coq. We also provide a Java implementation that showcases the applicability of AtomiS in real-life programs.

cs.PL↗

Anticipation of Method Execution in Mixed Consistency Systems -- Technical Report

Distributed applications often deal with data with different consistency requirements: while a post in a social network only requires weak consistency, the user balance in turn has strong correctness requirements, demanding mutations to be synchronised. To deal efficiently with sequences of operations on different replicas of the distributed application, it is useful to know which operations commute with others and thus, when can an operation not requiring synchronisation be anticipated wrt other requiring it, thus avoiding unnecessary waits. Herein we present a language-based static analysis to extract at compile-time from code information on which operations can commute with which other operations and thus get information that can be used by the run-time support to decide on call anticipations of operations in replicas without compromising consistency. We illustrate the formal analysis on several paradigmatic examples and briefly present a proof-of-concept implementation in Java.

cs.SC↗

Scheduling computations with provably low synchronization overheads

Work Stealing has been a very successful algorithm for scheduling parallel computations, and is known to achieve high performances even for computations exhibiting fine-grained parallelism. We present a variant of \ws\ that provably avoids most synchronization overheads by keeping processors' deques entirely private by default, and only exposing work when requested by thieves. This is the first paper that obtains bounds on the synchronization overheads that are (essentially) independent of the total amount of work, thus corresponding to a great improvement, in both algorithm design and theory, over state-of-the-art \ws\ algorithms. Consider any computation with work $T_{1}$ and critical-path length $T_{\infty}$ executed by $P$ processors using our scheduler. Our analysis shows that the expected execution time is $O\left(\frac{T_{1}}{P} + T_{\infty}\right)$, and the expected synchronization overheads incurred during the execution are at most $O\left(\left(C_{CAS} + C_{MFence}\right)PT_{\infty}\right)$, where $C_{CAS}$ and $C_{MFence}$ respectively denote the maximum cost of executing a Compare-And-Swap instruction and a Memory Fence instruction.

cs.DS↗

On the analysis of scheduling algorithms for structured parallel computations

Algorithms for scheduling structured parallel computations have been widely studied in the literature. For some time now, Work Stealing is one of the most popular for scheduling such computations, and its performance has been studied in both theory and practice. Although it delivers provably good performances, the effectiveness of its underlying load balancing strategy is known to be limited for certain classes of computations, particularly the ones exhibiting irregular parallelism (e.g. depth first searches). Many studies have addressed this limitation from a purely load balancing perspective, viewing computations as sets of independent tasks, and then analyzing the expected amount of work attached to each processor as the execution progresses. However, these studies make strong assumptions regarding work generation which, despite being standard from a queuing theory perspective --- where work generation can be assumed to follow some random distribution --- do not match the reality of structured parallel computations --- where the work generation is not random, only depending on the structure of a computation. In this paper, we introduce a formal framework for studying the performance of structured computation schedulers, define a criterion that is appropriate for measuring their performance, and present a methodology for analyzing the performance of randomized schedulers. We demonstrate the convenience of this methodology by using it to prove that the performance of Work Stealing is limited, and to analyze the performance of a Work Stealing and Spreading algorithm, which overcomes Work Stealing's limitation.

cs.DC↗

Time-Aware Publish/Subscribe for Networks of Mobile Devices

Smart mobile devices are increasingly ubiquitous and are the primary source of user-generated content, and current communication infrastructures are failing in keeping up with the rising demand for the avid sharing of such content. To alleviate this problem and fully harness the amount of resources currently available at the network edge, mobile edge paradigms started to emerge. Though, application developers still struggle to tap that potential at the edge due to the lack of adequate communication and interaction abstractions. Thus, we propose a high-level abstraction that can be easily exploited by developers to design mobile edge applications focused on data dissemination. In this paper, we propose Thyme, a novel extended topic-based, time-aware publish/subscribe system for networks of mobile devices. In Thyme, time is a rst order dimension. Each subscription has an associated time frame, starting and ending either in the future, present, or past. Making the past available requires both subscriptions and publications to be persistently stored. We present the design of Thyme and evaluate it using simulation, discussing and characterizing the scenarios best suited for its use.

cs.DC↗

Cache-Conscious Run-time Decomposition of Data Parallel Computations

Multi-core architectures feature an intricate hierarchy of cache memories, with multiple levels and sizes. To adequately decompose an application according to the traits of a particular memory hierarchy is a cumbersome task that may be rewarded with significant performance gains. The current state-of-the-art in memory-hierarchy-aware parallel computing delegates this endeavour on the programmer, demanding from him deep knowledge of both parallel programming and computer architecture. In this paper we propose the shifting of these memory-hierarchy-related concerns to the run-time system, which then takes on the responsibility of distributing the computation's data across the target memory hierarchy. We evaluate our approach from a performance perspective, comparing it against the common cache-neglectful data decomposition strategy.

cs.DC↗

Execution of Compound Multi-Kernel OpenCL Computations in Multi-CPU/Multi-GPU Environments

Current computational systems are heterogeneous by nature, featuring a combination of CPUs and GPUs. As the latter are becoming an established platform for high-performance computing, the focus is shifting towards the seamless programming of these hybrid systems as a whole. The distinct nature of the architectural and execution models in place raises several challenges, as the best hardware configuration is behaviour and workload dependent. In this paper, we address the execution of compound, multi-kernel, OpenCL computations in multi-CPU/multi-GPU environments. We address how these computations may be efficiently scheduled onto the target hardware, and how the system may adapt itself to changes in the workload to process and to fluctuations in the CPU's load. An experimental evaluation attests the performance gains obtained by the conjoined use of the CPU and GPU devices, when compared to GPU-only executions, and also by the use of data-locality optimizations in CPU environments.

cs.DC↗

Heterogeneous Programming with Single Operation Multiple Data

Heterogeneity is omnipresent in today's commodity computational systems, which comprise at least one multi-core Central Processing Unit (CPU) and one Graphics Processing Unit (GPU). Nonetheless, all this computing power is not being exploited in mainstream computing, as the programming of these systems entails many details of the underlying architecture and of its distinct execution models. Current research on parallel programming is addressing these issues but, still, the systems' heterogeneity is exposed at language level. This paper proposes a uniform framework, grounded on the Single Operation Multiple Data model, for the programming of such heterogeneous systems. The model is declarative, empowering the compiler to generate code for multiple architectures from the same source. To this extent, we designed a simple extension of the Java programming language that embodies the model, and developed a compiler that generates code for both multi-core CPUs and GPUs. A performance evaluation attests the validity of the approach that, despite being based on a simple programming model, is able to deliver performance gains on par with hand-tuned data parallel multi-threaded Java applications.

cs.DC↗