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Huazhong Yang

Publications and source records attributed to Huazhong Yang.

85 records · Page 5Linked to original sources

A General Scheme for Noise-Tolerant Logic Design Based on Probabilistic and DCVS Approaches

In this paper, a general circuit scheme for noise-tolerant logic design based on Markov Random Field theory and differential Cascade Voltage Switch technique has been proposed, which is an extension of the work in [1-3], [4]. A block with only four transistors has been successfully inserted to the original circuit scheme from [3] and extensive simulation results show that our proposed design can operate correctly with the input signal of 1 dB signal-noise-ratio. When using the evaluation parameter from [5], the output value of our design decreases by 76.5% on average than [3] which means that superior noise-immunity could be obtained through our work.

cs.AR↗

Physical Computing With No Clock to Implement the Gaussian Pyramid of SIFT Algorithm

Physical computing is a technology utilizing the nature of electronic devices and circuit topology to cope with computing tasks. In this paper, we propose an active circuit network to implement multi-scale Gaussian filter, which is also called Gaussian Pyramid in image preprocessing. Various kinds of methods have been tried to accelerate the key stage in image feature extracting algorithm these years. Compared with existing technologies, GPU parallel computing and FPGA accelerating technology, physical computing has great advantage on processing speed as well as power consumption. We have verified that processing time to implement the Gaussian pyramid of the SIFT algorithm stands on nanosecond level through the physical computing technology, while other existing methods all need at least hundreds of millisecond. With an estimate on the stray capacitance of the circuit, the power consumption is around 670pJ to filter a 256x256 image. To the best of our knowledge, this is the most fast processing technology to accelerate the SIFT algorithm, and it is also a rather energy-efficient method, thanks to the proposed physical computing technology.

cs.CV↗

Low-complexity video encoder for smart eyes based on underdetermined blind signal separation

This paper presents a low complexity video coding method based on Underdetermined Blind Signal Separation (UBSS). The detailed coding framework is designed. Three key techniques are proposed to enhance the compression ratio and the quality of the decoded frames. The experiments validate that the proposed method costs 30ms encoding time less than DISCOVER. The simulation shows that this new method can save 50% energy compared with H.264.

cs.MM↗

Increasing Compression Ratio of Low Complexity Compressive Sensing Video Encoder with Application-Aware Configurable Mechanism

With the development of embedded video acquisition nodes and wireless video surveillance systems, traditional video coding methods could not meet the needs of less computing complexity any more, as well as the urgent power consumption. So, a low-complexity compressive sensing video encoder framework with application-aware configurable mechanism is proposed in this paper, where novel encoding methods are exploited based on the practical purposes of the real applications to reduce the coding complexity effectively and improve the compression ratio (CR). Moreover, the group of processing (GOP) size and the measurement matrix size can be configured on the encoder side according to the post-analysis requirements of an application example of object tracking to increase the CR of encoder as best as possible. Simulations show the proposed framework of encoder could achieve 60X of CR when the tracking successful rate (SR) is still keeping above 90%.

cs.MM↗

A Novel Reconfigurable Computing Architecture for Image Signal Processing Using Circuit-Switched NoC and Synchronous Dataflow Model

In this paper, a novel reconfigurable architecture is proposed for multifunctional image signal processing systems. A circuit-switched NoC is used to provide interconnection because the non-TMD links ensure fixed throughput, which is a desirable behavior for computational intensive image processing algorithms compared with packet-switched NoC. Image processing algorithms are modeled as synchronous dataflow graphs which provide a unified model for general computing procedure. An image processing system is considered as several temporally mutually exclusive algorithms. Thus, their dataflow graph representations could be considered as a group and a merging algorithm could be applied to generate a union graph while eliminating spatial redundancy for area consumption optimization. After the union graph have been mapped and routed on the NoC, the reconfigurable system could be configured to any of its target image processing algorithms by properly setting the NoC topology. Experiments show the demo reconfigurable system with two image processing applications cost 26.4% less hardware resource, compared with the non-reconfigurable implementations.

cs.AR↗

A Novel Video Compression Approach Based on Underdetermined Blind Source Separation

This paper develops a new video compression approach based on underdetermined blind source separation. Underdetermined blind source separation, which can be used to efficiently enhance the video compression ratio, is combined with various off-the-shelf codecs in this paper. Combining with MPEG-2, video compression ratio could be improved slightly more than 33%. As for combing with H.264, 4X~12X more compression ratio could be achieved with acceptable PSNR, according to different kinds of video sequences.

cs.MM↗

Mini-step Strategy for Transient Analysis

Domain decomposition methods are widely used to solve sparse linear systems from scientific problems, but they are not suited to solve sparse linear systems extracted from integrated circuits. The reason is that the sparse linear system of integrated circuits may be non-diagonal-dominant, and domain decomposition method might be unconvergent for these non-diagonal-dominant matrices. In this paper, we propose a mini-step strategy to do the circuit transient analysis. Different from the traditional large-step approach, this strategy is able to generate diagonal-dominant sparse linear systems. As a result, preconditioned domain decomposition methods can be used to simulate the large integrated circuits on the supercomputers and clouds.

cs.CE↗

Transmission line inspires a new distributed algorithm to solve linear system of circuit

Transmission line, or wire, is always troublesome to integrated circuits designers, but it could be helpful to parallel computing researchers. This paper proposes the Virtual Transmission Method (VTM), which is a new distributed and stationary iterative algorithm to solve the linear system extracted from circuit. It tears the circuit by virtual transmission lines to achieve distributed computing. For the symmetric positive definite (SPD) linear system, VTM is proved to be convergent. For the unsymmetrical linear system, numerical experiments show that VTM is possible to achieve better convergence property than the traditional stationary algorithms. VTM could be accelerated by some preconditioning techniques, and the convergence speed of VTM is fast when its preconditioner is properly chosen.

cs.CE↗

Waveform Transmission Method, a New Waveform-relaxation Based Algorithm to Solve Ordinary Differential Equations in Parallel

Waveform Relaxation method (WR) is a beautiful algorithm to solve Ordinary Differential Equations (ODEs). However, because of its poor convergence capability, it was rarely used. In this paper, we propose a new distributed algorithm, named Waveform Transmission Method (WTM), by virtually inserting waveform transmission lines into the dynamical system to achieve distributed computing of extremely large ODEs. WTM has better convergence capability than the traditional WR algorithms.

math.NA↗

Virtual Transmission Method, A New Distributed Algorithm to Solve Sparse Linear System

In this paper, we propose a new parallel algorithm which could work naturally on the parallel computer with arbitrary number of processors. This algorithm is named Virtual Transmission Method (VTM). Its physical backgroud is the lossless transmission line and microwave network. The basic idea of VTM is to insert lossless transmission lines into the sparse linear system to achieve distributed computing. VTM is proved to be convergent to solve SPD linear system. Preconditioning method and performance model are presented. Numerical experiments show that VTM is efficient, accurate and stable. Accompanied with VTM, we bring in a new technique to partition the symmetric linear system, which is named Generalized Node & Branch Tearing (GNBT). It is based on Kirchhoff's Current Law from circuit theory. We proved that GNBT is feasible to partition any SPD linear system.

math.NA↗

Directed Transmission Method, A Fully Asynchronous approach to Solve Sparse Linear Systems in Parallel

In this paper, we propose a new distributed algorithm, called Directed Transmission Method (DTM). DTM is a fully asynchronous and continuous-time iterative algorithm to solve SPD sparse linear system. As an architecture-aware algorithm, DTM could be freely running on all kinds of heterogeneous parallel computer. We proved that DTM is convergent by making use of the final-value theorem of Laplacian Transformation. Numerical experiments show that DTM is stable and efficient.

math.NA↗

Transmission Line Inspires A New Distributed Algorithm to Solve the Nonlinear Dynamical System of Physical Circuit

As known, physical circuits, e.g. integrated circuits or power system, work in a distributed manner, but these circuits could not be easily simulated in a distributed way. This is mainly because that the dynamical system of physical circuits is nonlinear and the linearized system of physical circuits is nonsymmetrical. This paper proposes a simple and natural strategy to mimic the distributed behavior of the physical circuit by mimicking the distributed behavior of the internal wires inside this circuit. Mimic Transmission Method (MTM) is a new distributed algorithm to solve the nonlinear ordinary differential equations extracted from physical circuits. It maps the transmission delay of interconnects between subcircuits to the communication delay of digital data link between processors. MTM is a black-box algorithm. By mimicking the transmission lines, MTM seals the nonlinear dynamical system within the subcircuit. As the result, we do not need to pay attention on how to solve the nonlinear dynamic system or nonsymmetrical linear system in parallel. MTM is a global direct algorithm, and it does only one distributed computation at each time window to obtain accurate result, so unconvergence issues do not need to be worried about.

cs.DC↗

A Fault-tolerant Structure for Reliable Multi-core Systems Based on Hardware-Software Co-design

To cope with the soft errors and make full use of the multi-core system, this paper gives an efficient fault-tolerant hardware and software co-designed architecture for multi-core systems. And with a not large number of test patterns, it will use less than 33% hardware resources compared with the traditional hardware redundancy (TMR) and it will take less than 50% time compared with the traditional software redundancy (time redundant).Therefore, it will be a good choice for the fault-tolerant architecture for the future high-reliable multi-core systems.

cs.AR↗