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Huizhi Zhao

Publications and source records attributed to Huizhi Zhao.

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ArchSim: Computer Architecture Simulation as a Service

Conducting a complete computer architecture simulation study is challenging because configuration, execution, and analysis are often encoded implicitly in scripts or directory conventions rather than represented explicitly. As a result, studies are difficult to scale, hard to reproduce, and dependent on custom tooling at every stage. We present ArchSim, which makes the structure of a simulation study explicit. In ArchSim, hardware topologies are described as declarative graphs that automatically generate executable simulation code, eliminating hand-written simulator programs. Stateless runners autonomously claim and execute jobs from a shared experiment store, enabling configuration-benchmark matrices to scale without manual orchestration. Simulation outputs are stored as structured artifacts tied to configurations, benchmarks, and hardware components, enabling systematic result exploration without custom parsers. We evaluate ArchSim on a 12 x 8 = 96-configuration simulation matrix spanning memory-bound, compute-bound, and mixed-intensity GPU workloads. Declarative simulation specifications drive full simulations with a median kernel time error of 0.18% relative to hand-written MGPUSim configurations across 95.8% of configurations. The platform introduces only 1.6 seconds of overhead per simulation, negligible relative to realistic simulation workloads.

cs.AR

Akita: A High Usability Simulation Framework for Computer Architecture

Computer architecture simulation is essential for evaluating new designs without the need for costly tapeout. The community has developed dozens of valuable simulators that have enabled significant architectural advances. However, using and developing simulators remains a major barrier due to ad-hoc component interfaces, strict deployment requirements, the burden of managing performance optimizations like parallelization at the component level, and limited monitoring and visualization capabilities. The root cause of these limitations is the systematic neglect of user and developer experience in favor of technical functionality. We believe that only by separating technical concerns from user and developer experience concerns -- through a dedicated simulation engine decoupled from hardware models -- can the community overcome these fundamental obstacles and enable more productive architectural research. Akita embodies this philosophy as a dedicated simulation engine that cleanly separates infrastructure from architectural models. Smart Ticking and Availability Backpropagation let developers write simple cycle-based code while achieving event-driven performance. Parallel simulation happens transparently -- developers write single-threaded code while Akita handles multi-core execution. Akita's simple, uniform, yet powerful simulation tracing support enables real-time monitoring and post-simulation visualization. We demonstrate the flexibility of Akita through case studies, including the development of a trace-based DNN simulation and a RISC-V CPU simulation, showing how prioritizing developer experience accelerates architectural research.

cs.DC