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J. C. Yun

Publications and source records attributed to J. C. Yun.

3 recordsLinked to original sources

Simulated Lorentz Force Detuning Compensation With A Double Lever Tuner On A Dressed ILC/1.3 GHZ Cavity At Room Temperature

Pulsed SRF linacs with high accelerating gradients experience large frequency shifts caused by Lorentz force detuning (LFD). A piezoelectric actuator with a resonance control algorithm can maintain the cavity frequency at the nominal level, thus reducing the RF power. This study uses a double lever tuner with a piezoelectric actuator for compensation and another piezoelectric actuator to simulate the effects of the Lorentz force pulse. A double lever tuner has an advantage by increasing the stiffness of the cavity-tuner system, thus reducing the impact of LFD. The tests are conducted at room temperature and with a dressed 1.3 GHz 9-cell cavity.

physics.acc-ph

Accelerated Lifetime Test of The SRF Dressed Cavity/Tuner System for LCLS II HE Project

The off-frequency detune method is being considered for application in the LCLS-II-HE superconducting linac to produce multi-energy electron beams for supporting multiple undulator lines simultaneously [1]. Design of the tuner has been changed to deliver roughly 3 times larger frequency tuning range. Working requirements for off-frequency operation (OFO) state that cavities be tuned at least twice a month. This specification requires the in-crease of the tuner longevity by 20 times compared with LCLS-II demands. Accelerated longevity tests of the LCLS-II HE dressed cavity with tuner were conducted at FNAL's HTS. Detail analysis of wearing and impacts on performances of the tuner's piezo and stepper motor actuators will be presented. Additionally, results of longevity testing of the dressed cavity bellow, when cooled down to 2 K and compressed by 2.6 mm for roughly 2000 cycles, will be presented.

physics.acc-ph

Demonstration of fine pitch FCOB (Flip Chip on Board) assembly based on solder bumps at Fermilab

Bump bonding is a superior assembly alternative compared to conventional wire bond techniques. It offers a highly reliable connection with greatly reduced parasitic properties. The Flip Chip on Board (FCOB) procedure is an especially attractive packaging method for applications requiring a large number of connections at moderate pitch. This paper reports on the successful demonstration of FCOB assembly based on solder bumps down to 250um pitch using a SUESS MA8 flip chip bonder at Fermilab. The assembly procedure will be described, microscopic cross sections of the connections are shown, and first measurements on the contact resistance are presented.

physics.ins-det