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Jacopo Franco

Publications and source records attributed to Jacopo Franco.

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Wafer-Level 1/f Noise Characterization of Scaled P-Type Nanosheets and Comparison with Planar HKMG Transistors

We present a comprehensive wafer-level 1/f noise study of scaled Gate-All-Around (GAA) p-type nanosheet transistors and benchmark them against large-area planar High- \k{appa} Metal Gate (HKMG) devices to assess the impact of device architecture on reliability. By statistically analyzing noise data from 188 nanosheets, we extract the effective trap density in the dielectric and compare it to that of planar transistors with identical gate stack, comparable processing thermal budgets, and no specific reliability anneals. The effective trap density extracted from 1/f noise is comparable in planar and nanosheet architectures. This indicates that transitioning to GAA nanosheets does not increase noise, which remains governed by gate stack quality.

cond-mat.mes-hall

Understanding oxide-thickness-dependent variability in dense Si-MOS quantum dot arrays

Achieving uniform and scalable control of semiconductor spin qubits remains a key challenge for large scale quantum computing. In this work, we investigate how gate oxide thickness influences uniformity in dense two dimensional silicon quantum dot arrays. Using a 7 x 7 array fabricated in a 300 mm CMOS-process patterned by EUV lithography, we statistically characterize 392 quantum dots across four different oxide thicknesses. The threshold voltages, capacitances, lever arms, and charging energies are extracted using parallel row based measurements and we identify an optimal SiO2 thickness of 17 nm that minimizes threshold voltage variability below 63 mV standard deviation. Our observations illustrate how multiple sources of disorder can introduce competing oxide-thickness dependencies, resulting in non-monotonic trends. These results provide key design guidelines for dense, scalable silicon spin qubit architectures.

quant-ph

Revealing the Partially Coherent Nature of Transport in IGZO

Thin-film transistors based on amorphous oxide semiconductors (AOS) are promising candidates for enabling further DRAM scaling and 3D integration, which are critical for advanced computing. Despite extensive research, the charge transport mechanism in these disordered semiconductors remains poorly understood. In this work, we investigate charge transport in the archetypical AOS material, indium gallium zinc oxide (IGZO), across a range of compositions and temperatures using thin-film transistors and Hall bar structures. Our results show that the electrons involved in transport exhibit partially spatial coherence and non-degenerate conduction. Under these conditions, transport is dominated by electron transfer across insulating gaps between locally coherent regions, rather than by degenerate percolative transport above a mobility edge, or by localized-state hopping, both of which are widely assumed in the literature. While fluctuation-induced tunnelling has previously been invoked to describe low-temperature transport in oxide transistors, we show that such behavior originates from partially coherent electronic states and develop a field-effect-aware fluctuation-induced tunnelling (FEAFIT) framework that explicitly accounts for gate modulation of the tunneling landscape. The FEAFIT model accurately predicts experimental data across all compositions, temperatures, and gate voltages, enabling extraction of fundamental transport parameters. These tunnelling parameters are then correlated with electron coherence dimensions and the degree of energetic disorder obtained from first-principles calculations. Our findings advance the fundamental understanding of charge transport in AOS-based transistors and provide a foundation for further performance improvements

cond-mat.mtrl-sci

Comphy v3.0 -- A Compact-Physics Framework for Modeling Charge Trapping Related Reliability Phenomena in MOS Devices

Charge trapping plays an important role for the reliability of electronic devices and manifests itself in various phenomena like bias temperature instability (BTI), random telegraph noise (RTN), hysteresis or trap-assisted tunneling (TAT). In this work we present Comphy v3.0, an open source physical framework for modeling these effects in a unified fashion using nonradiative multiphonon theory on a one-dimensional device geometry. Here we give an overview about the underlying theory, discuss newly introduced features compared to the original Comphy framework and also review recent advances in reliability physics enabled by these new features. The usefulness of Comphy v3.0 for the reliability community is highlighted by several practical examples including automatic extraction of defect distributions, modeling of TAT in high-k capacitors and BTI/RTN modeling at cryogenic temperatures.

physics.app-ph