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James Russell

Publications and source records attributed to James Russell.

5 recordsLinked to original sources

Discrete Wavelet Transform for Serial X-ray Crystallography Image Segmentation

Upcoming LCLS-II/II-HE operation at repetition rates approaching 1MHz demands on-detector data reduction to manage the resulting data volumes. We present a 2D discrete wavelet transform (DWT) pre-processing algorithm that segments background scatter from crystal diffraction in serial crystallography images, enabling early data analysis and, when combined with peak finding, lossy compression by transmitting only the identified diffraction peaks. The method zeroes the approximation (LL) coefficients of a multi-level Haar wavelet decomposition and reconstructs from detail subbands only, exploiting the natural separation of smooth background and sharp Bragg peaks in the wavelet domain. Evaluated on 100 simulated nanoBragg frames with known ground truth, the pipeline achieves $F1 \approx 0.96$ at four decomposition levels ($J = 4$), substantially outperforming the established peakfinder8 algorithm ($F1 \approx 0.37$) in both precision ($P \approx 1.00$ vs.\ $0.94$) and recall ($R \approx 0.92$ vs.\ $0.24$). A comparison of 12 wavelet families confirms that Haar is optimal for Bragg-peak detection due to its minimal filter support. Downstream crystallographic analysis performed on real ePix10kA data shows that CC* and $R_\mathrm{split}$ converge at $J = 4$ and track the unprocessed baseline through the practical resolution limit. Under added noise exceeding $\sim$50 ADU, the current pipeline's precision degrades significantly more than that of the pf8 algorithm, exposing a limitation of the proposed strategy. We also demonstrate an FPGA implementation of the DWT filters on an Alveo U200 at 200MHz, with a projected resource footprint compatible with integration into the upcoming ePixUHR firmware and a path to on-detector ASIC implementation in SparkPix detector family.

physics.ins-det

FPGA-Accelerated Real-Time Diagnostics at DIII-D Using the SLAC Neural Network Library for ML Inference

In this work, we demonstrate the deployment of a hardware-accelerated machine learning (ML) inference system integrated into a real-time processing at the DIII-D tokamak fusion reactor. The team has successfully deployed an AMD/Xilinx KCU1500 field-programmable gate array (FPGA) into the realtime Plasma Control System (PCS) nodes that receives the live Beam Emission Spectroscopy (BES) signal used for Edge Localized Mode (ELM) forecasting. The FPGA hosts a dense neural network using the SLAC Neural Network Library (SNL) that has been trained to infer the likelihood of disruptive ELM conditions. This likelihood then feeds a separate plasma controller that uses Resonant Magnetic Perturbation coils to suppress the predicted disruptive condition. The SNL allows for on-the-fly updates of the neural network weights and biases without requiring full hardware resynthesis for the FPGA. Judicious design of the neural-network architecture can further allow for the hot-swapping of multiple classification tasks to be executed on the single FPGA, significantly enhancing the real-time adaptability of the system for context-aware control strategies that respond in real-time to evolving reactor conditions. These adaptive weights naturally support continuous model refinement and seamless task switching during live experimental operation. This use case is chosen as a high rate signal processing example that can serve as a template for general ML-based reactor diagnostic processing for active reactor control systems. We see this as an essential development for achieving reactor relevant operation in future continuous operation fusion devices.

physics.plasm-ph

FPGA-Accelerated Real-Time Beam Emission Spectroscopy Diagnostics at DIII-D Using the SLAC Neural Network Library for ML Inference

Achieving reliable real-time control of tokamak plasmas is essential for sustaining high-performance operation in next-generation fusion reactors. A major challenge is the accurate and timely prediction of edge-localized modes (ELMs), especially in high-confinement regimes such as wide-pedestal quiescent H-mode. We present a hardware-accelerated machine learning (ML) inference system integrated into the RTSTAB processing node of the DIII-D real-time diagnostic and control infrastructure. The system uses an AMD/Xilinx KCU1500 FPGA to enable ultra low latency plasma state classification and ELM forecasting. Input features come from real-time Beam Emission Spectroscopy (BES), and the ML model is implemented as a dense neural network using the SLAC Neural Network Library (SNL). A key capability is SNL dynamic parameter loading, which allows on-the-fly updates of neural network weights and biases without hardware resynthesis. This enables multiple classification tasks on a single FPGA design and supports adaptive control strategies that respond to evolving plasma conditions. By decoupling inference from fixed-weight configurations, the system supports continuous model refinement and seamless task switching during live operation. The SNL-based inference engine is fully integrated with the FPGA in the DIII-D RTSTAB Plasma Control System (PCS), improving ELM avoidance, confinement, and operational stability. These results show the feasibility of embedding dynamically reconfigurable FPGA-based ML inference into real-time fusion diagnostic pipelines, providing a scalable and resilient path toward intelligent and autonomous plasma control in future magnetic confinement fusion devices.

physics.plasm-ph

FPGA-Accelerated SpeckleNN with SNL for Real-time X-ray Single-Particle Imaging

We implement a specialized version of our SpeckleNN model for real-time speckle pattern classification in X-ray Single-Particle Imaging (SPI) using the SLAC Neural Network Library (SNL) on an FPGA. This hardware is optimized for inference near detectors in high-throughput X-ray free-electron laser (XFEL) facilities like the Linac Coherent Light Source (LCLS). To fit FPGA constraints, we optimized SpeckleNN, reducing parameters from 5.6M to 64.6K (98.8% reduction) with 90% accuracy. We also compressed the latent space from 128 to 50 dimensions. Deployed on a KCU1500 FPGA, the model used 71% of DSPs, 75% of LUTs, and 48% of FFs, with an average power consumption of 9.4W. The FPGA achieved 45.015us inference latency at 200 MHz. On an NVIDIA A100 GPU, the same inference consumed ~73W and had a 400us latency. Our FPGA version achieved an 8.9x speedup and 7.8x power reduction over the GPU. Key advancements include model specialization and dynamic weight loading through SNL, eliminating time-consuming FPGA re-synthesis for fast, continuous deployment of (re)trained models. These innovations enable real-time adaptive classification and efficient speckle pattern vetoing, making SpeckleNN ideal for XFEL facilities. This implementation accelerates SPI experiments and enhances adaptability to evolving conditions.

physics.ins-det

Cooperative Localisation of a GPS-Denied UAV in 3-Dimensional Space Using Direction of Arrival Measurements

This paper presents a novel approach for localising a GPS (Global Positioning System)-denied Unmanned Aerial Vehicle (UAV) with the aid of a GPS-equipped UAV in three-dimensional space. The GPS-equipped UAV makes discrete-time broadcasts of its global coordinates. The GPS-denied UAV simultaneously receives the broadcast and takes direction of arrival (DOA) measurements towards the origin of the broadcast in its local coordinate frame (obtained via an inertial navigation system (INS)). The aim is to determine the difference between the local and global frames, described by a rotation and a translation. In the noiseless case, global coordinates were recovered exactly by solving a system of linear equations. When DOA measurements are contaminated with noise, rank relaxed semidefinite programming (SDP) and the Orthogonal Procrustes algorithm are employed. Simulations are provided and factors affecting accuracy, such as noise levels and number of measurements, are explored.

cs.RO