arXiv subjects

Jan Herbst

Publications and source records attributed to Jan Herbst.

4 recordsLinked to original sources

arXiv2026

Multi-Objective RIS Deployment Optimization for Physical Layer Security in ISAC Networks

Reconfigurable Intelligent Surfaces (RIS) have emerged as a key enabler for programmable wireless environments in future Beyond-5G (B5G) and 6G networks. In the meantime, Integrated Sensing and Communication (ISAC) and Physical-Layer Security (PLS) are becoming essential functionalities for next-generation wireless systems, particularly in safety and mission-critical applications. However, jointly optimizing RIS-assisted systems to support communication, sensing, and security introduces complex and often conflicting design trade-offs. In this work, a multi-objective optimization framework for RIS-assisted networks is proposed, aiming to jointly analyze communication performance, sensing accuracy, and security-related channel properties in a unified system perspective. The proposed model jointly considers RIS deployment location, orientation, surface size, and an ISAC configuration weight that controls the allocation of RIS reflection gain between communication and sensing tasks. Simulation results reveal inherent trade-offs among communication reliability, sensing accuracy, and security performance. The proposed framework provides valuable insights into the interplay between communication, sensing, and security, and enables the design of efficient RIS deployment and configuration strategies for secure ISAC-enabled 6G wireless networks.

eess.SP↗

arXiv2025

Benchmarking OpenWiFiSync on ESP32: Towards Cost-Effective Wireless Time Synchronization

Wireless time synchronization of mobile devices is a key enabler for numerous Industry 4.0 applications, such as coordinated and synchronized tasks or the generation of high-precision timestamps for machine learning or artificial intelligence algorithms. Traditional wireline clock synchronization protocols, however, cannot achieve the performance in wireless environments without significant modifications. To address this challenge, we make use of the Reference Broadcast Infrastructure Synchronization protocol, which leverages the broadcast nature of wireless communications and remains both non-invasive and standard-compliant. We implement and validate this protocol on a low-cost testbed using ESP32 modules and a commercial Wi-Fi access point. To support further research and development, we release our implementation as open-source software under the GNU General Public License Version 3 license via the OpenWifiSync project on GitHub. Our results demonstrate that synchronization accuracies within +/-30 microseconds are achievable using energy-efficient and affordable hardware, making this approach suitable for a wide range of use cases.

cs.NI↗

arXiv2025

Implementation Analysis of Collaborative Robot Digital Twins in Physics Engines

This paper presents a Digital Twin (DT) of a 6G communications system testbed that integrates two robotic manipulators with a high-precision optical infrared tracking system in Unreal Engine 5. Practical details of the setup and implementation insights provide valuable guidance for users aiming to replicate such systems, an endeavor that is crucial to advancing DT applications within the scientific community. Key topics discussed include video streaming, integration within the Robot Operating System 2 (ROS 2), and bidirectional communication. The insights provided are intended to support the development and deployment of DTs in robotics and automation research.

cs.RO↗

arXiv2024

Latency optimized Deep Neural Networks (DNNs): An Artificial Intelligence approach at the Edge using Multiprocessor System on Chip (MPSoC)

Almost in every heavily computation-dependent application, from 6G communication systems to autonomous driving platforms, a large portion of computing should be near to the client side. Edge computing (AI at Edge) in mobile devices is one of the optimized approaches for addressing this requirement. Therefore, in this work, the possibilities and challenges of implementing a low-latency and power-optimized smart mobile system are examined. Utilizing Field Programmable Gate Array (FPGA) based solutions at the edge will lead to bandwidth-optimized designs and as a consequence can boost the computational effectiveness at a system-level deadline. Moreover, various performance aspects and implementation feasibilities of Neural Networks (NNs) on both embedded FPGA edge devices (using Xilinx Multiprocessor System on Chip (MPSoC)) and Cloud are discussed throughout this research. The main goal of this work is to demonstrate a hybrid system that uses the deep learning programmable engine developed by Xilinx Inc. as the main component of the hardware accelerator. Then based on this design, an efficient system for mobile edge computing is represented by utilizing an embedded solution.

cs.AR↗