arXiv subjects

Jeroen Verjauw

Publications and source records attributed to Jeroen Verjauw.

7 recordsLinked to original sources

arXiv2026

Mitigating crosstalk errors for simultaneous single-qubit gates on a superconducting quantum processor

Single-qubit gates on superconducting quantum processors are typically implemented using microwave pulses applied through dedicated control lines. However, these microwave pulses may also drive other qubits due to crosstalk arising from capacitive coupling and wavefunction overlap in systems with closely spaced transition frequencies. Crosstalk and frequency crowding increase errors during simultaneous single-qubit operations relative to isolated gates, thus forming a major bottleneck for scaling superconducting quantum processors. In this work, we combine model-based qubit frequency optimization with pulse shaping to demonstrate crosstalk error mitigation in single-qubit gates on a 49-qubit superconducting quantum processor. We introduce and experimentally verify an analytical model of simultaneous single-qubit gate error caused by microwave crosstalk that depends on a given pulse shape. By employing a model-based optimization strategy of qubit frequencies, we minimize the crosstalk-induced error across the processor and achieve a mean simultaneous single-qubit gate fidelity of 99.96% for a 16-ns gate duration, approaching the mean individual gate fidelity. To further reduce the simultaneous error and required qubit frequency bandwidth on high-crosstalk qubit pairs, we introduce a crosstalk transition suppression (CTS) pulse shaping technique that minimizes the spectral energy around transitions inducing leakage and crosstalk errors. Finally, we combine CTS with model-based frequency optimization across the device and experimentally show a systematic reduction in the required qubit frequency bandwidth for high-fidelity simultaneous gates, supported by simulations of systems with up to 1000 qubits. By alleviating constraints on qubit frequency bandwidth for parallel single-qubit operations, this work represents an important step for scaling towards larger quantum processors.

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arXiv2025

A Superconducting Qubit-Resonator Quantum Processor with Effective All-to-All Connectivity

In this work we introduce a superconducting quantum processor architecture that uses a transmission-line resonator to implement effective all-to-all connectivity between six transmon qubits. This architecture can be used as a test-bed for algorithms that benefit from high connectivity. We show that the central resonator can be used as a computational element, which offers the flexibility to encode a qubit for quantum computation or to utilize its bosonic modes which further enables quantum simulation of bosonic systems. To operate the quantum processing unit (QPU), we develop and benchmark the qubit-resonator conditional Z gate and the qubit-resonator MOVE operation. The latter allows for transferring a quantum state between one of the peripheral qubits and the computational resonator. We benchmark the QPU performance and achieve a genuinely multi-qubit entangled Greenberger-Horne-Zeilinger (GHZ) state over all six qubits with a readout-error mitigated fidelity of $0.86$.

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arXiv2025

Above 99.9% Fidelity Single-Qubit Gates, Two-Qubit Gates, and Readout in a Single Superconducting Quantum Device

Achieving high-fidelity single-qubit gates, two-qubit gates, and qubit readout is critical for building scalable, error-corrected quantum computers. However, device parameters that enhance one operation often degrade the others, making simultaneous optimization challenging. Here, we demonstrate that careful tuning of qubit-coupler coupling strengths in a superconducting circuit with two transmon qubits coupled via a tunable coupler enables high-fidelity single- and two-qubit gates, without compromising readout performance. As a result, we achieve a 40h-averaged CZ gate fidelity of 99.93%, simultaneous single-qubit gate fidelities of 99.98%, and readout fidelities over 99.94% in a single device. These results are enabled by optimized coupling parameters, an efficient CZ gate calibration experiment based on our new Phased-Averaged Leakage Error Amplification (PALEA) protocol, and a readout configuration compatible with high coherence qubits. Our results demonstrate a viable path toward scaling up superconducting quantum processors while maintaining consistently high fidelities across all core operations.

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arXiv2025

Quantum error detection in qubit-resonator star architecture

Achieving industrial quantum advantage is unlikely without the use of quantum error correction (QEC). Other QEC codes beyond surface code are being experimentally studied, such as color codes and quantum Low-Density Parity Check (qLDPC) codes, that could benefit from new quantum processing unit (QPU) architectures. We introduce the six-qubit star lattice architecture that offers parallelism and effective local all-to-all connectivity and thus enables hardware-efficient implementation of certain QEC codes. As a first demonstration of this new architecture, we encode two logical qubits in a six-qubit superconducting QPU with a star-topology using the [[4, 2, 2]] code and characterize the logical states with the classical shadow framework. Logical life-time and logical error rate are measured over repeated quantum error detection cycles for various logical states including a logical Bell state. We measure logical state fidelities above 96 % for every cardinal logical state, find logical life-times above the best physical element, and logical error-per-cycle values ranging from 0.25(2) % to 0.91(3) %. In future, such star QPU can be tiled to enable QEC codes with high-weight and overlapping stabilizers for improved encoding rates.

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arXiv2025

Quantum algorithms for simulating systems coupled to bosonic modes using a hybrid resonator-qubit quantum computer

Modeling composite systems of spins or electrons coupled to bosonic modes is of significant interest for many fields of applied quantum physics and chemistry. A quantum simulation can allow for the solution of quantum problems beyond classical numerical methods. However, implementing this on existing noisy quantum computers can be challenging due to the mapping between qubits and bosonic degrees of freedom, often requiring a large number of qubits or deep quantum circuits. In this work, we discuss quantum algorithms to solve composite systems by augmenting conventional superconducting qubits with microwave resonators used as computational elements. This enables direct representation of bosonic modes by resonators. We derive efficient algorithms for typical models and propose a device connectivity that allows for feasible scaling of simulations with linear overhead. We also show how the dissipation of resonators can be a useful parameter for modeling continuous bosonic baths. Experimental results demonstrating these methods were obtained on the IQM Resonance cloud platform, based on high-fidelity gates and tunable couplers. These results present the first digital quantum simulation including a computational resonator on a commercial quantum platform.

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arXiv2022

Overcoming I/O bottleneck in superconducting quantum computing: multiplexed qubit control with ultra-low-power, base-temperature cryo-CMOS multiplexer

Large-scale superconducting quantum computing systems entail high-fidelity control and readout of large numbers of qubits at millikelvin temperatures, resulting in a massive input-output bottleneck. Cryo-electronics, based on complementary metal-oxide-semiconductor (CMOS) technology, may offer a scalable and versatile solution to overcome this bottleneck. However, detrimental effects due to cross-coupling between the electronic and thermal noise generated during cryo-electronics operation and the qubits need to be avoided. Here we present an ultra-low power radio-frequency (RF) multiplexing cryo-electronics solution operating below 15 mK that allows for control and interfacing of superconducting qubits with minimal cross-coupling. We benchmark its performance by interfacing it with a superconducting qubit and observe that the qubit's relaxation times ($T_1$) are unaffected, while the coherence times ($T_2$) are only minimally affected in both static and dynamic operation. Using the multiplexer, single qubit gate fidelities above 99.9%, i.e., well above the threshold for surface-code based quantum error-correction, can be achieved with appropriate thermal filtering. In addition, we demonstrate the capability of time-division-multiplexed qubit control by dynamically windowing calibrated qubit control pulses. Our results show that cryo-CMOS multiplexers could be used to significantly reduce the wiring resources for large-scale qubit device characterization, large-scale quantum processor control and quantum error correction protocols.

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arXiv2021

Millikelvin temperature cryo-CMOS multiplexer for scalable quantum device characterisation

Quantum computers based on solid state qubits have been a subject of rapid development in recent years. In current Noisy Intermediate-Scale Quantum (NISQ) technology, each quantum device is controlled and characterised though a dedicated signal line between room temperature and base temperature of a dilution refrigerator. This approach is not scalable and is currently limiting the development of large-scale quantum system integration and quantum device characterisation. Here we demonstrate a custom designed cryo-CMOS multiplexer operating at 32 mK. The multiplexer exhibits excellent microwave properties up to 10 GHz at room and millikelvin temperatures. We have increased the characterisation throughput with the multiplexer by measuring four high-quality factor superconducting resonators using a single input and output line in a dilution refrigerator. Our work lays the foundation for large-scale microwave quantum device characterisation and has the perspective to address the wiring problem of future large-scale quantum computers.

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