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Jiayun Song

Publications and source records attributed to Jiayun Song.

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TIDE: An FPGA quantum-control processor for deterministic adaptive execution with guarded runtime program revision

Measurement-responsive quantum experiments require control programs that can revise future operations after execution has begun without disturbing events already committed to precise timing. We present Time-Deterministic and Instruction-Dynamic Execution (TIDE), an FPGA quantum-control processor that separates a runtime-revisable future from a hardware-timed committed-event stream. TIDE provides two complementary update paths: Dynamic Instruction Parameter Update (DIPU) applies a one-shot patch to the next matching event before parameter capture, while Dynamic Instruction Stream Overwrite (DISO) performs guarded replacement, logical deletion, and out-of-line insertion in future resident-program regions. Per-channel committed-event FIFOs isolate accepted descriptors from subsequent control-core and update activity. The implemented Xilinx ZCU102 design meets timing at 250 MHz for the control core and 425 MHz for the timing/update domain. With downstream ready, every tested descriptor committed at least one timing-domain cycle before its programmed timestamp was dispatched in the programmed cycle at the registered output interfaces. In separate post-commit tests, committed timestamps and payloads remained unchanged under the applied perturbations. The minimum all-success mapped DIPU margin was four 250 MHz control-domain cycles. Under continuous payload delivery, an L-word contiguous overwrite completed in L+5 update-domain cycles. Within the characterized guard-distance range, rejected DISO requests preserved the resident path, whereas all admitted replacement, deletion, and insertion transactions exercised here executed a complete revised sequence. TIDE therefore enables runtime adaptation of both parameters and instruction structure while preserving deterministic service of committed quantum-control events.

quant-ph

HEDN: A Hard-Easy Dual Network with Source Reliability Assessment for Cross-Subject EEG Emotion Recognition

Cross-subject electroencephalography (EEG) emotion recognition remains a major challenge in brain-computer interfaces (BCIs) due to substantial inter-subject variability. Multi-Source Domain Adaptation (MSDA) offers a potential solution, but existing MSDA frameworks typically assume equal source quality, leading to negative transfer from low-reliability domains and prohibitive computational overhead due to multi-branch model designs. To address these limitations, we propose the Hard-Easy Dual Network (HEDN), a lightweight reliability-aware MSDA framework. HEDN introduces a novel Source Reliability Assessment (SRA) mechanism that dynamically evaluates the structural integrity of each source domain during training. Based on this assessment, sources are routed to two specialized branches: an Easy Network that exploits high-quality sources to construct fine-grained, structure-aware prototypes for reliable pseudo-label generation, and a Hard Network that utilizes adversarial training to refine and align low-quality sources. Furthermore, a cross-network consistency loss aligns predictions between branches to preserve semantic coherence. Extensive experiments conducted on SEED, SEED-IV, and DEAP datasets demonstrate that HEDN achieves state-of-the-art performance across both cross-subject and cross-dataset evaluation protocols while reducing adaptation complexity.

cs.HC