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Jing Hao Chai

Publications and source records attributed to Jing Hao Chai.

7 recordsLinked to original sources

Simulating general noise nearly as cheaply as Pauli noise

Stabilizer simulation of Clifford quantum circuits - error-correction circuits, Clifford subroutines, etc. - on classical computers has played a central role in our understanding of circuit performance. The stabilizer description, however, restricts the accessible noise one can incorporate into the simulation to Pauli-type noise. More general noise, including coherent errors, may have more severe impact on circuit performance than Pauli noise; yet, such general noise have been difficult to access, much less investigate fully, in numerical simulations. Here, through the use of stratified importance sampling, we show how general noise can be simulated within the stabilizer formalism in reasonable time, with non-unitary noise being nearly as cheap as Pauli noise. Unitary (or coherent) noise can require an order of magnitude more time for the simulation, but nevertheless completes in very reasonable times, a drastic improvement over past approaches that typically fail to converge altogether. Our work thus enables detailed beyond-Pauli understanding of circuit performance in the presence of real device noise, which is rarely Pauli in nature. Among other examples, we present direct simulation results for the performance of the popular rotated planar surface codes under circuit-level general noise, previously available only in limited situations and/or through mappings to efficiently simulatable physical models.

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Information-efficient decoding of surface codes

Surface codes are a popular error-correction route to fault-tolerant quantum computation. The so-called exponential backlog problem that can arise when one has to do logical $T$-gates within the surface code demands real-time decoding of the syndrome information to diagnose the appropriate Pauli frame in which to do the gate. This in turn puts a minimum requirement on the communication rate between the quantum processing unit, where the syndrome information is collected, and the classical processor, where the decoding algorithm is run. This minimum communication rate can be difficult to achieve while preserving the quality of the quantum processor. Here, we present two decoders that make use of a reduced syndrome information volume, relying on a number of syndrome bits that scale only as the width -- and not the usual area -- of the surface-code patch. This eases the communication requirements necessary for real-time decoding.

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Fault-tolerant embedding of quantum circuits on hardware architectures via swap gates

In near-term quantum computing devices, connectivity between qubits remain limited by architectural constraints. A computational circuit with given connectivity requirements necessary for multi-qubit gates have to be embedded within physical hardware with fixed connectivity. Long-distance gates have to be done by first routing the relevant qubits together. The simplest routing strategy involves the use of swap gates to swap the information carried by two unconnected qubits to connected ones. Ideal swap gates just permute the qubits; real swap gates, however, have the added possibilities of causing simultaneous errors on the qubits involved and spreading errors across the circuit. A general swap scheme thus changes the error-propagation properties of a circuit, including those necessary for fault-tolerant functioning of a circuit. Here, we present a simple strategy to design the swap scheme needed to embed an abstract circuit onto a physical hardware with constrained connectivity, in a manner that preserves the fault-tolerant properties of the abstract circuit. The embedded circuit will, of course, be noisier, compared to a native implementation of the abstract circuit, but we show in the examples of embedding surface codes on heavy-hexagonal and hexagonal lattices that the deterioration is not severe. This then offers a straightforward solution to implementing circuits with fault-tolerance properties on current hardware.

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Optimizing resource efficiencies for scalable full-stack quantum computers

In the race to build scalable quantum computers, minimizing the resource consumption of their full stack to achieve a target performance becomes crucial. It mandates a synergy of fundamental physics and engineering: the former for the microscopic aspects of computing performance, and the latter for the macroscopic resource consumption. For this we propose a holistic methodology dubbed Metric-Noise-Resource (MNR) able to quantify and optimize all aspects of the full-stack quantum computer, bringing together concepts from quantum physics (e.g., noise on the qubits), quantum information (e.g., computing architecture and type of error correction), and enabling technologies (e.g., cryogenics, control electronics, and wiring). This holistic approach allows us to define and study resource efficiencies as ratios between performance and resource cost. As a proof of concept, we use MNR to minimize the power consumption of a full-stack quantum computer, performing noisy or fault-tolerant computing with a target performance for the task of interest. Comparing this with a classical processor performing the same task, we identify a quantum energy advantage in regimes of parameters distinct from the commonly considered quantum computational advantage. This provides a previously overlooked practical argument for building quantum computers. While our illustration uses highly idealized parameters inspired by superconducting qubits with concatenated error correction, the methodology is universal -- it applies to other qubits and error-correcting codes -- and provides experimenters with guidelines to build energy-efficient quantum processors. In some regimes of high energy consumption, it can reduce this consumption by orders of magnitudes. Overall, our methodology lays the theoretical foundation for resource-efficient quantum technologies.

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On the fault-tolerance threshold for surface codes with general noise

Fault-tolerant quantum computing based on surface codes has emerged as a popular route to large-scale quantum computers capable of accurate computation even in the presence of noise. Its popularity is, in part, because the fault-tolerance or accuracy threshold for surface codes is believed to be less stringent than competing schemes. This threshold is the noise level below which computational accuracy can be increased by increasing physical resources for noise removal, and is an important engineering target for realising quantum devices. The current conclusions about surface code thresholds are, however, drawn largely from studies of probabilistic noise. While a natural assumption, current devices experience noise beyond such a model, raising the question of whether conventional statements about the thresholds apply. Here, we attempt to extend past proof techniques to derive the fault-tolerance threshold for surface codes subjected to general noise with no particular structure. Surprisingly, we found no nontrivial threshold, i.e., there is no guarantee the surface code prescription works for general noise. While this is not a proof that the scheme fails, we argue that current proof techniques are likely unable to provide an answer. A genuinely new idea is needed, to reaffirm the feasibility of surface code quantum computing.

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Limitations in quantum computing from resource constraints

Fault-tolerant schemes can use error correction to make a quantum computation arbitrarily ac- curate, provided that errors per physical component are smaller than a certain threshold and in- dependent of the computer size. However in current experiments, physical resource limitations like energy, volume or available bandwidth induce error rates that typically grow as the computer grows. Taking into account these constraints, we show that the amount of error correction can be opti- mized, leading to a maximum attainable computational accuracy. We find this maximum for generic situations where noise is scale-dependent. By inverting the logic, we provide experimenters with a tool to finding the minimum resources required to run an algorithm with a given computational accuracy. When combined with a full-stack quantum computing model, this provides the basis for energetic estimates of future large-scale quantum computers.

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Studies on Point Estimators for Incomplete Tomography of Qutrits

This is a Bachelor's thesis on point estimators for incomplete tomography of qutrits as of 2014, submitted to the National University of Singapore. The main content of the thesis focuses on various methods of estimation such as maximum entropy and average estimator and show that they are quite different. Numerical simulations of these methods show however that these estimators perform very close to one another. Therefore on this basis, there is no reason to favor one method over another.

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