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Jinghong Chen

Publications and source records attributed to Jinghong Chen.

34 records · Page 2Linked to original sources

The 120Gbps VCSEL Array Based Optical Transmitter (ATx) Development for the High-Luminosity LHC (HL-LHC) Experiments

The integration of a Verticle Cavity Surface-Emitting Laser (VCSEL) array and a driving Application-Specific Integrated Circuit (ASIC) in a custom optical array transmitter module (ATx) for operation in the detector front-end is constructed, assembled and tested. The ATx provides 12 parallel channels with each channel operating at 10 Gbps. The optical transmitter eye diagram passes the eye mask and the bit-error rate (BER) less than 1E-12 transmission is achieved at 10 Gbps/ch. The overall insertion loss including the radiation induced attenuation is sufficiently low to meet the proposed link budget requirement.

physics.ins-det↗

Optical Data Transmission ASICs for the High-Luminosity LHC (HL-LHC) Experiments

We present the design and test results of two optical data transmission ASICs for the High-Luminosity LHC (HL-LHC) experiments. These ASICs include a two-channel serializer (LOCs2) and a single-channel Vertical Cavity Surface Emitting Laser (VCSEL) driver (LOCld1V2). Both ASICs are fabricated in a commercial 0.25-um Silicon-on-Sapphire (SoS) CMOS technology and operate at a data rate up to 8 Gbps per channel. The power consumption of LOCs2 and LOCld1V2 are 1.25 W and 0.27 W at 8-Gbps data rate, respectively. LOCld1V2 has been verified meeting the radiation-tolerance requirements for HL-LHC experiments.

physics.ins-det↗

The Clock Distribution System for the ATLAS Liquid Argon Calorimeter Phase-I Upgrade Demonstrator

A prototype Liquid-argon Trigger Digitizer Board (LTDB), called the LTDB Demonstrator, has been developed to demonstrate the functions of the ATLAS Liquid Argon Calorimeter Phase-I trigger electronics upgrade. Forty Analog-to-Digital converters and four FPGAs with embedded multi-gigabit-transceivers on each Demonstrator need high quality clocks. A clock distribution system based on commercial components has been developed for the Demonstrator. The design of the clock distribution system is presented. The performance of the clock distribution system has been evaluated. The components used in the clock distribution system have been qualified to meet radiation tolerance requirements of the Demonstrator.

physics.ins-det↗

The VCSEL-based Array Optical Transmitter (ATx) Development Towards 120-Gbps Link for Collider Detector: Development Update

A compact radiation-tolerant array optical transmitter module (ATx) is developed to provide data transmission up to 10Gbps per channel with 12 parallel channels for collider detector applications. The ATx integrates a Vertical Cavity Surface-Emitting Laser (VCSEL) array and driver circuitry for electrical to optical conversion, an edge warp substrate for the electrical interface and a micro-lens array for the optical interface. This paper reports the continuing development of the ATx custom package. A simple, high-accuracy and reliable active-alignment method for the optical coupling is introduced. The radiation-resistance of the optoelectronic components is evaluated and the inclusion of a custom-designed array driver is discussed.

physics.ins-det↗

JTAG-based Remote Configuration of FPGAs over Optical Fibers

In this paper, a remote FPGA-configuration method based on JTAG extension over optical fibers is presented. The method takes advantage of commercial components and ready-to-use software such as iMPACT and does not require any hardware or software development. The method combines the advantages of the slow remote JTAG configuration and the fast local flash memory configuration. The method has been verified successfully and used in the Demonstrator of Liquid-Argon Trigger Digitization Board (LTDB) for the ATLAS liquid argon calorimeter Phase-I trigger upgrade. All components on the FPGA side are verified to meet the radiation tolerance requirements.

physics.ins-det↗

STAGER checklist: Standardized Testing and Assessment Guidelines for Evaluating Generative AI Reliability

Generative Artificial Intelligence (AI) holds immense potential in medical applications. Numerous studies have explored the efficacy of various generative AI models within healthcare contexts, but there is a lack of a comprehensive and systematic evaluation framework. Given that some studies evaluating the ability of generative AI for medical applications have deficiencies in their methodological design, standardized guidelines for their evaluation are also currently lacking. In response, our objective is to devise standardized assessment guidelines tailored for evaluating the performance of generative AI systems in medical contexts. To this end, we conducted a thorough literature review using the PubMed and Google Scholar databases, focusing on research that tests generative AI capabilities in medicine. Our multidisciplinary team, comprising experts in life sciences, clinical medicine, medical engineering, and generative AI users, conducted several discussion sessions and developed a checklist of 23 items. The checklist is designed to encompass the critical evaluation aspects of generative AI in medical applications comprehensively. This checklist, and the broader assessment framework it anchors, address several key dimensions, including question collection, querying methodologies, and assessment techniques. We aim to provide a holistic evaluation of AI systems. The checklist delineates a clear pathway from question gathering to result assessment, offering researchers guidance through potential challenges and pitfalls. Our framework furnishes a standardized, systematic approach for research involving the testing of generative AI's applicability in medicine. It enhances the quality of research reporting and aids in the evolution of generative AI in medicine and life sciences.

cs.HC↗

Fine-grained Late-interaction Multi-modal Retrieval for Retrieval Augmented Visual Question Answering

Knowledge-based Visual Question Answering (KB-VQA) requires VQA systems to utilize knowledge from external knowledge bases to answer visually-grounded questions. Retrieval-Augmented Visual Question Answering (RA-VQA), a strong framework to tackle KB-VQA, first retrieves related documents with Dense Passage Retrieval (DPR) and then uses them to answer questions. This paper proposes Fine-grained Late-interaction Multi-modal Retrieval (FLMR) which significantly improves knowledge retrieval in RA-VQA. FLMR addresses two major limitations in RA-VQA's retriever: (1) the image representations obtained via image-to-text transforms can be incomplete and inaccurate and (2) relevance scores between queries and documents are computed with one-dimensional embeddings, which can be insensitive to finer-grained relevance. FLMR overcomes these limitations by obtaining image representations that complement those from the image-to-text transforms using a vision model aligned with an existing text-based retriever through a simple alignment network. FLMR also encodes images and questions using multi-dimensional embeddings to capture finer-grained relevance between queries and documents. FLMR significantly improves the original RA-VQA retriever's PRRecall@5 by approximately 8\%. Finally, we equipped RA-VQA with two state-of-the-art large multi-modal/language models to achieve $\sim61\%$ VQA score in the OK-VQA dataset.

cs.CL↗

Grounding Description-Driven Dialogue State Trackers with Knowledge-Seeking Turns

Schema-guided dialogue state trackers can generalise to new domains without further training, yet they are sensitive to the writing style of the schemata. Augmenting the training set with human or synthetic schema paraphrases improves the model robustness to these variations but can be either costly or difficult to control. We propose to circumvent these issues by grounding the state tracking model in knowledge-seeking turns collected from the dialogue corpus as well as the schema. Including these turns in prompts during finetuning and inference leads to marked improvements in model robustness, as demonstrated by large average joint goal accuracy and schema sensitivity improvements on SGD and SGD-X.

cs.CL↗

Schema-Guided Semantic Accuracy: Faithfulness in Task-Oriented Dialogue Response Generation

Ensuring that generated utterances are faithful to dialogue actions is crucial for Task-Oriented Dialogue Response Generation. Slot Error Rate (SER) only partially measures generation quality in that it solely assesses utterances generated from non-categorical slots whose values are expected to be reproduced exactly. Utterances generated from categorical slots, which are more variable, are not assessed by SER. We propose Schema-Guided Semantic Accuracy (SGSAcc) to evaluate utterances generated from both categorical and non-categorical slots by recognizing textual entailment. We show that SGSAcc can be applied to evaluate utterances generated from a wide range of dialogue actions in the Schema Guided Dialogue (SGD) dataset with good agreement with human judgment. We also identify a previously overlooked weakness in generating faithful utterances from categorical slots in unseen domains. We show that prefix tuning applied to T5 generation can address this problem. We further build an ensemble of prefix-tuning and fine-tuning models that achieves the lowest SER reported and high SGSAcc on the SGD dataset.

cs.CL↗

The Miniature Optical Transmitter and Transceiver For the High-Luminosity LHC (HL-LHC) experiments

We present the design and test results of the Miniature optical Transmitter (MTx) and Transceiver (MTRx) for the high luminosity LHC (HL-LHC) experiments. MTx and MTRx are Transmitter Optical Subassembly (TOSA) and Receiver Optical Subassembly (ROSA) based. There are two major developments: the Vertical Cavity Surface Emitting Laser (VCSEL) driver ASIC LOCld and the mechanical latch that provides the connection to fibers. In this paper, we concentrate on the justification of this work, the design of the latch and the test results of these two modules with a Commercial Off-The-Shelf (COTS) VCSEL driver.

physics.ins-det↗

A line code with quick-resynchronization capability and low latency for the optical data links of LHC experiments

We propose a line code that has fast resynchronization capability and low latency. Both the encoder and decoder have been implemented in FPGAs. The encoder has also been implemented in an ASIC. The latency of the whole optical link (not including the optical fiber) is estimated to be less than 73.9 ns. In the case of radiation-induced link synchronization loss, the decoder can recover the synchronization in 25 ns. The line code will be used in the ATLAS liquid argon calorimeter Phase-I trigger upgrade and can also be potentially used in other LHC experiments.

physics.ins-det↗

Component Prototypes towards a Low-Latency, Small-form-factor Optical Link for the ATLAS Liquid Argon Calorimeter Phase-I Trigger Upgrade

This paper presents several component prototypes towards a low-latency, small-form-factor optical link designed for the ATLAS Liquid Argon Calorimeter Phase-I trigger upgrade. A prototype of the custom-made dual-channel optical transmitter module, the Miniature optical Transmitter (MTx), with separate transmitter optical sub-assemblies (TOSAs) has been demonstrated at data rates up to 8 Gbps per channel. A Vertical-Cavity Surface-Emitting Laser (VCSEL) driver ASIC has been developed and is used in the current MTx prototypes. A serializer ASIC prototype, operating at up to 8 Gbps per channel, has been designed and tested. A low-latency, low-overhead encoder ASIC prototype has been designed and tested. The latency of the whole link, including the transmitter latency and the receiver latency but not the latency of the fiber, is estimated to be less than 57.9 ns. The size of the MTx is 45 mm x 15 mm x 6 mm.

physics.ins-det↗

The Clock and Control System for the ATLAS Liquid Argon Calorimeter Phase-I Upgrade

A Liquid-argon Trigger Digitizer Board (LTDB) is being developed to upgrade the ATLAS Liquid Argon Calorimeter Phase-I trigger electronics. The LTDB located at the front end needs to obtain the clock signals and be configured and monitored remotely from the back end. A clock and control system is being developed for the LTDB and the major functions of the system have been evaluated. The design and evaluation of the clock and control system are presented in this paper.

physics.ins-det↗

LOCx2, a Low-latency, Low-overhead, 2 x 5.12-Gbps Transmitter ASIC for the ATLAS Liquid Argon Calorimeter Trigger Upgrade

In this paper, we present the design and test results of LOCx2, a transmitter ASIC for the ATLAS Liquid Argon Calorimeter trigger upgrade. LOCx2 consists of two channels and each channel encodes ADC data with an overhead of 14.3% and transmits serial data at 5.12 Gbps with a latency of less than 27.2 ns. LOCx2 is fabricated with a commercial 0.25-um Silicon-on-Sapphire CMOS technology and is packaged in a 100-pin QFN package. The power consumption of LOCx2 is about 843 mW.

physics.ins-det↗

Mid-board miniature dual channel optical transmitter MTx and transceiver MTRx

We report the development of a mid-board, TOSA and ROSA based miniature dual channel optical transmitter (MTx) and a transceiver (MTRx). The design transmission data rate is 5.12 Gbps per channel and receiving data rate 4.8 Gbps. MTx and MTRx are only 6 mm tall and are electrically and optically pluggable. Although the fiber TOSA/ROSA coupling is through a custom latch, the fiber uses the standard LC ferrule, flange and spring. Light coupling is ensured by the TOSA and ROSA with the LC coupling mechanism. With the dual channel serializer LOCx2 sits under MTx, one achieves high data transmission with a small PCB footprint, and enjoys the reliability of the hermetically packaged TOSA. MTx and MTRx are designed for detector front-end readout of the ATLAS Liquid Argon Calorimeter (LAr) trigger upgrade.

physics.ins-det↗

A Low-Power, Low-Latency, Dual-Channel Serializer ASIC for Detector Front-End Readout

In this paper, we present a dual-channel serializer ASIC, LOCx2, and its pin-compatible backup, LOCx2-130, for detector front-end readout. LOCx2 is fabricated in a 0.25-um Silicon-on-Sapphire CMOS process and each channel operates at 5.12 Gbps, while LOCx2-130 is fabricated in a 130-nm bulk CMOS process and each channel operates at 4.8 Gbps. The power consumption and the transmission latency are 900 mW and 27 ns for LOCx2 and the corresponding simulation result of LOCx2-130 are 386 mW and 38 ns, respectively.

physics.ins-det↗