arXiv subjects

Jun Fujisaki

Publications and source records attributed to Jun Fujisaki.

10 recordsLinked to original sources

arXiv2026

Adaptive Window Decoding based on Spatiotemporal Complementary Gap

Real-time decoding plays a crucial role in practical fault-tolerant quantum computing. Window decoding, in which the decoding problem is divided into windows, is a promising approach. While reducing the window size is desirable for faster decoding, each window contains a buffer region whose size must typically be at least the code distance to avoid degrading the logical error rate, which limits how much the window can shrink. In this paper, we propose an adaptive decoding scheme in which window decoding is first performed with a small buffer size and a decoding confidence (soft information) is computed; if the confidence is low, the buffer size is enlarged and decoding is redone. This approach reduces the average decoding time, since most shots are decoded with a small buffer. A central challenge in realizing this scheme is that existing forms of soft information are not directly applicable to window decoding, especially with a small buffer. We address this challenge by introducing a new form of soft information, the spatiotemporal complementary gap, specifically designed for this setting. Numerical simulations demonstrate that the proposed scheme reduces the average buffer size by approximately 40% while maintaining the logical error rate.

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arXiv2026

STAR-Magic Mutation: Even More Efficient Analog Rotation Gates for Early Fault-Tolerant Quantum Computer

We introduce STAR-magic mutation, an efficient protocol for implementing logical rotation gates on early fault-tolerant quantum computers. This protocol judiciously combines two of the latest state preparation protocols: transversal multi-rotation protocol and magic state cultivation. It achieves a logical rotation gate with a favorable error scaling of $\mathcal{O}(\theta_L^{2(1-\Theta(1/d))}p_{\text{ph}})$, while requiring only the ancillary space of a single surface code patch. Here, $\theta_L$ is the logical rotation angle, $p_{\text{ph}}$ is the physical error rate, and $d$ is the code distance. This scaling marks a significant improvement over the previous state-of-the-art, $\mathcal{O}(\theta_L p_{\text{ph}})$, making our protocol particularly powerful for implementing a sequence of small-angle rotation gates, like Trotter-based circuits. Notably, for $\theta_L \lesssim 10^{-5}$, our protocol achieves a two-order-of-magnitude reduction in both the execution time and the error rate of analog rotation gates compared to the standard $T$-gate synthesis using cultivated magic states. Building upon this protocol, we also propose a novel quantum computing architecture designed for early fault-tolerant quantum computers, dubbed ``STAR ver.~3". It employs a refined circuit compilation strategy based on Clifford+$T$+$\phi$ gate set, rather than the conventional Clifford+$T$ or Clifford+$\phi$ gate sets. We establish a theoretical bound on the feasible circuit size on this architecture and illustrate its capabilities by analyzing the spacetime costs for simulating the dynamics of quantum many-body systems. Specifically, we demonstrate that our architecture can simulate biologically-relevant molecules or lattice models at scales beyond the reach of exact classical simulation, with only a few hundred thousand physical qubits, even assuming a realistic error rate of $p_{\text{ph}}=10^{-3}$.

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arXiv2026

Even More Efficient Soft-Output Decoding with Extra-Cluster Growth and Early Stopping

In fault-tolerant quantum computing, soft outputs from real-time decoders play a crucial role in improving decoding accuracy, post-selecting magic states, and accelerating lattice surgery. A recent paper by Meister et al. [arXiv:2405.07433 (2024)] proposed an efficient method to evaluate soft outputs for cluster-based decoders, including the Union-Find (UF) decoder. However, in parallel computing environments, its computational complexity is comparable to or even surpasses that of the UF decoder itself, resulting in a substantial overhead. Furthermore, this method requires global information about the decoding graph, making it poorly suited for existing hardware implementations of the UF decoder on Field-Programmable Gate Arrays (FPGAs). In this paper, to alleviate these issues, we develop more efficient methods for evaluating high-quality soft outputs in cluster-based decoders by introducing several early-stopping techniques. Our central idea is that the precise value of a large soft output is often unnecessary in practice. Based on this insight, we introduce two types of novel soft-outputs: the bounded cluster gap and the extra-cluster gap. The former reduces the computational complexity of Meister's method by terminating the calculation at an early stage. Our numerical simulations show that this method achieves improved scaling with code distance $d$ compared to the original proposal. The latter, the extra-cluster gap, quantifies decoder reliability by performing a small, additional growth of the clusters obtained by the decoder. This approach offers the significant advantage of enabling soft-output computation without modifying the existing architecture of FPGA-implemented UF decoders. These techniques offer lower computational complexity and higher hardware compatibility, laying a crucial foundation for future real-time decoders with soft outputs.

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arXiv2025

Decoder Switching: Breaking the Speed-Accuracy Tradeoff in Real-Time Quantum Error Correction

The realization of fault-tolerant quantum computers hinges on the construction of high-speed, high-accuracy, real-time decoding systems. The persistent challenge lies in the fundamental trade-off between speed and accuracy: efforts to improve the decoder's accuracy often lead to unacceptable increases in decoding time and hardware complexity, while attempts to accelerate decoding result in a significant degradation in logical error rate. To overcome this challenge, we propose a novel framework, decoder switching, which balances these competing demands by combining a faster, soft-output decoder ("weak decoder") with a slower, high-accuracy decoder ("strong decoder"). In usual rounds, the weak decoder processes error syndromes and simultaneously evaluates its reliability via soft information. Only when encountering a decoding window with low reliability do we switch to the strong decoder to achieve more accurate decoding. Numerical simulations suggest that this framework can achieve accuracy comparable to, or even surpassing, that of the strong decoder, while maintaining an average decoding time on par with the weak decoder. We also develop an online decoding scheme tailored to our framework, named double window decoding, and elucidate the criteria for preventing an exponential slowdown of quantum computation. These findings break the long-standing speed-accuracy trade-off, paving the way for scalable real-time decoding devices.

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arXiv2025

Runtime reduction in lattice surgery utilizing time-like soft information

Runtime optimization of the quantum computing within a given computational resource is important to achieve practical quantum advantage. In this paper, we propose a runtime reduction protocol for the lattice surgery, which utilizes the soft information corresponding to the logical measurement error. Our proposal is a simple two-step protocol: operating the lattice surgery with the small number of syndrome measurement cycles, and reexecuting it with full syndrome measurement cycles in cases where the time-like soft information catches logical error symptoms. We firstly discuss basic features of the time-like complementary gap as the concrete example of the time-like soft information based on numerical results. Then, we show that our protocol surpasses the existing runtime reduction protocol called temporally encoded lattice surgery (TELS) for the most cases. In addition, we confirm that the combination of our protocol and the TELS protocol can reduce the runtime further, over 50% in comparison to the naive serial execution of the lattice surgery. The proposed protocol in this paper can be applied to any quantum computing architecture based on the lattice surgery, and we expect that this will be one of the fundamental building blocks of runtime optimization to achieve practical scale quantum computing.

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arXiv2024

Compilation of Trotter-Based Time Evolution for Partially Fault-Tolerant Quantum Computing Architecture

Achieving practical quantum speedup with limited resources is a crucial challenge in both academic and industrial communities. To address this, a partially fault-tolerant quantum computing architecture called ``space-time efficient analog rotation quantum computing architecture (STAR architecture)'' has been recently proposed. This architecture focuses on minimizing resource requirements while maximizing the precision of non-Clifford gates, essential for universal quantum computation. However, non-deterministic processes such as the repeat-until-success (RUS) protocol and state injection can introduce significant computational overhead. Therefore, optimizing the logical circuit to minimize this overhead by using efficient fault-tolerant operations is essential. This paper presents an efficient method for simulating the time evolution of the 2D Hubbard model Hamiltonian, a promising application of the STAR architecture. We present two techniques, parallel injection protocol and adaptive injection region updating, to reduce unnecessary time overhead specific to our architecture. By integrating these with the existing fSWAP technique, we develop an efficient Trotter-based time evolution operation for the 2D Hubbard model. Our analysis reveals an acceleration of over 10 times compared to naive serial compilation. This optimized compilation enables us to estimate the computational resources required for quantum phase estimation of the 2D Hubbard model. For devices with a physical error rate of $p_{\rm phys} = 10^{-4}$, we estimate that approximately $6.5 \times 10^4$ physical qubits are required to achieve faster ground state energy estimation of the $8\times8$ Hubbard model compared to classical computation.

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arXiv2024

Practical quantum advantage on partially fault-tolerant quantum computer

Achieving quantum speedups in practical tasks remains challenging for current noisy intermediate-scale quantum (NISQ) devices. These devices always encounter significant obstacles such as inevitable physical errors and the limited scalability of current near-term algorithms. Meanwhile, assuming a typical architecture for fault-tolerant quantum computing (FTQC), realistic applications inevitably require a vast number of qubits, typically exceeding $10^6$, which seems far beyond near-term realization. In this work, to bridge the gap between the NISQ and FTQC eras, we propose an alternative approach to achieve practical quantum advantages on early-FTQC devices. Our framework is based on partially fault-tolerant logical operations to minimize spatial overhead and avoids the costly distillation techniques typically required for executing non-Clifford gates. To this end, we develop a space-time efficient state preparation protocol to generate an ancillary non-Clifford state consumed for implementing an analog rotation gate with an arbitrary small angle $θ$ and a remarkably low worst-case error rate below $\mathcal{O}(|θ| p_{\text{ph}})$, where $p_{\text{ph}}$ is the physical error rate. Furthermore, we propose several error suppression schemes tailored to our preparation protocol, which are essential to minimize the overhead for mitigating errors. Based on this framework, we present several promising applications that leverage the potential of our framework, including the Trotter simulation and quantum phase estimation (QPE). Notably, we demonstrate that our framework allows us to perform the QPE for $(8\times 8)$-site Hubbard model with fewer than $4.9\times 10^4$ qubits and an execution time of 9 days (or 12 minutes with full parallelization) under $p_{\text{ph}}=10^{-4}$, which is significantly faster than recent classical estimation with tensor network techniques (DMRG and PEPS).

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arXiv2023

Comparative study of decoding the surface code using simulated annealing under depolarizing noise

We explored decoding methods for the surface code under depolarizing noise by mapping the problem into the Ising model optimization. We consider two kinds of mapping with and without a soft constraint and also various optimization solvers, including simulated annealing implemented on a CPU, "Fujitsu Digital Annealer" (DA), a hardware architecture specialized for the Ising problems, and CPLEX, an exact integer programming solver. We find that the proposed Ising-based decoding approaches provide higher accuracy compared to the minimum-weight perfect matching (MWPM) algorithm for depolarizing noise and comparable to minimum distance decoding using CPLEX. While decoding time is longer than MWPM when we compare it with a single core CPU, our method is amenable to parallelization and easy to implement on dedicated hardware, suggesting potential future speedups. Regarding the mapping methods to the Ising model with and without a soft constraint, the SA decoder yielded higher accuracy without a soft constraint. In contrast, the DA decoder shows less difference between the two mapping methods, which indicates that DA can find a better solution with smaller number of iterations even under the soft constraint. Our results are important for devising efficient and fast decoders feasible with quantum computer control devices.

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arXiv2023

Quantum error correction with an Ising machine under circuit-level noise

Efficient decoding to estimate error locations from outcomes of syndrome measurement is the prerequisite for quantum error correction. Decoding in presence of circuit-level noise including measurement errors should be considered in case of actual quantum computing devices. In this work, we develop a decoder for circuit-level noise that solves the error estimation problems as Ising-type optimization problems. We confirm that the threshold theorem in the surface code under the circuitlevel noise is reproduced with an error threshold of approximately 0.4%. We also demonstrate the advantage of the decoder through which the Y error detection rate can be improved compared with other matching-based decoders. Our results reveal that a lower logical error rate can be obtained using our algorithm compared with that of the minimum-weight perfect matching algorithm.

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arXiv2022

A Practical and Scalable Decoder for Topological Quantum Error Correction with Digital Annealer

Quantum error correction is one of the most important milestones for realization of large-scale quantum computation. To achieve this, it is essential not only to integrate a large number of qubits with high fidelity, but also to build a scalable classical system that can perform error correction. Here, we propose an efficient and scalable decoder for quantum error correction using Fujitsu Digital Annealer (DA). Specifically, the error correction problem of stabilizer codes is mapped into an Ising-type optimization problem, so-called quadratic unconstrained binary optimization (QUBO) problem, which is solved by DA. In particular, we implement the proposed DA decoder for the surface code and perform detailed numerical experiments for various code distances to see its performance and scalability. We observe that computational scaling for the DA decoder has a lower order of polynomial than the decoding methods using simulated annealing (SA) and minimum-weight perfect matching (MWPM) algorithm under all tested conditions. It is also shown that the DA decoder has advantages over the Union-Find (UF) decoder from a variety of perspectives including hardware implementation. Furthermore, the threshold behavior of the logical error probability for the DA decoder is analyzed and the resultant threshold lies between 9.4% and 9.8%, which is very close to that obtained by the MWPM decoder. This result clearly shows the high potential of the DA decoder for quantum error correction.

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