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K. Nakayoshi

Publications and source records attributed to K. Nakayoshi.

5 recordsLinked to original sources

Development and operational experience of magnetic horn system for T2K experiment

A magnetic horn system to be operated at a pulsed current of 320 kA and to survive high-power proton beam operation at 750 kW was developed for the T2K experiment. The first set of T2K magnetic horns was operated for over 12 million pulses during the four years of operation from 2010 to 2013, under a maximum beam power of 230 kW, and $6.63\times10^{20}$ protons were exposed to the production target. No significant damage was observed throughout this period. This successful operation of the T2K magnetic horns led to the discovery of the $ν_μ\rightarrowν_e$ oscillation phenomenon in 2013 by the T2K experiment. In this paper, details of the design, construction, and operation experience of the T2K magnetic horns are described.

physics.ins-det

Measurement of the muon beam direction and muon flux for the T2K neutrino experiment

The Tokai-to-Kamioka (T2K) neutrino experiment measures neutrino oscillations by using an almost pure muon neutrino beam produced at the J-PARC accelerator facility. The T2K muon monitor was installed to measure the direction and stability of the muon beam which is produced together with the muon neutrino beam. The systematic error in the muon beam direction measurement was estimated, using data and MC simulation, to be 0.28 mrad. During beam operation, the proton beam has been controlled using measurements from the muon monitor and the direction of the neutrino beam has been tuned to within 0.3 mrad with respect to the designed beam-axis. In order to understand the muon beam properties,measurement of the absolute muon yield at the muon monitor was conducted with an emulsion detector. The number of muon tracks was measured to be $(4.06\pm0.05)\times10^4$ cm$^{-2}$ normalized with $4\times10^{11}$ protons on target with 250 kA horn operation. The result is in agreement with the prediction which is corrected based on hadron production data.

physics.ins-det

Development of a pipeline CAMAC controller with PC/104-Plus single board computer

A pipeline CAMAC controller with PC/104-Plus single board computer has been developed. The architecture of the pipeline CAMAC controller is completely different from that of traditional CAMAC controller. The pipeline CAMAC controller adopted truly pipelined command and data paths from/to computer memory to/from CAMAC. The pipeline method enabled the controller maximum speed of CAMAC, approximately up to 3 MB/sec with 24-bit data. The controller also has a DAQ function such as event numbering for co-existence with other equipment such as VME. Not only the functionality and the performance but also the pipeline architecture and the design concept are described.

physics.ins-det

The Data Acquisition System Based on PMC Bus

High energy physics experiments in KEK/Japan rush into over KHz trigger stage. Thus, we need a successor of the data acquisition(DAQ) system that replaces the CAMAC or FASTBUS systems. To meet these needs, we have developed a DAQ system which includes a crate, base-board modules, daughter cards for front-end A/D or T/D conversion, and back-end communication cards for data transfer and timing control. The size of the crate is for the 9U Euro-cards with the standard VME32 bus and extension connectors for power supply. The base-board comprises of a local bus with the sequencer connected to the front-end daughter cards via event buffering FIFOs, and the standard PMC (PCI mezzanine card) bus to be set a PMC processor unit to reduce data size from the front-end daughter cards. A data transfer module, which is connected to the event building system, and a trigger control unit, which communicates with the central timing controller are installed on the back-end communication card connected to the rear end of the base-board. We describe the design of this DAQ system and evaluate the performance of it.

physics.ins-det

Development of a PCI Based Data Acquisition Platform for High Intensity Accelerator Experiments

Data logging at an upgraded KEKB accelerator or the J-PARC facility, currently under commission, requires a high density data acquisition platform with integrated data reduction CPUs. To follow market trends, we have developed a DAQ platform based on the PCI bus, a choice which permits a fast DAQ and a long expected lifetime of the system. The platform is a 9U-VME motherboard consisting of four slots for signal digitization modules, readout FIFOs for data buffering, and three PMC slots, on one of which resides a data reduction CPU. We have performed long term and thermal stability tests. The readout speed on the platform has been measured up to 125 MB/s in DMA mode.

hep-ex