arXiv subjects

Kaitlin N. Smith

Publications and source records attributed to Kaitlin N. Smith.

At least 19 recordsLinked to original sources

arXiv2026

Hardware Fingerprinting FTQC via Quantum Decoder Timing

As the quantum computing field transitions toward Fault-Tolerant Quantum Computing (FTQC), intensive efforts are focused on scaling architectures and realizing active error correction. However, this shift introduces security surfaces that remain largely unexplored. Fault-tolerant quantum computers pair a quantum processor with a classical decoder that sits on the critical path of every syndrome-extraction round. For the first time, this work demonstrates that the wall-clock time each decoder takes to process a syndrome measurement and decoding round constitutes a novel, exploitable hardware side channel on physical quantum hardware. Using per-shot decoder timings from three IBM Heron processors collected over a 68-day window, the decode-time distribution alone allows a passive observer to (i) reconstruct the shot-by-shot detector-firing distribution and estimate the workload's logical error rate $p_L$, (ii) infer the code distance in use, and (iii) fingerprint the specific physical device with up to 89% accuracy (a random guess is 33%), with a pooled two-sample Kolmogorov-Smirnov test confirming the decode-time distributions are statistically distinct. In noisy simulation inspired by public data from Google's 105-qubit Willow processor, decoder timing further distinguishes 9 surface-code patches at different locations on the chip with 81% accuracy, showing the side channel persists on below-threshold fault-tolerant hardware from a different vendor and code family.

cs.CR↗

arXiv2026

Generalizing Pauli Checks for Qudit-based Quantum Error Detection and Mitigation

Pauli Check Sandwiching (PCS) is a quantum error detection (QED) technique that protects a quantum circuit by utilizing a pair of controlled Pauli operators, or checks, and detecting errors that anti-commute with the checks. Further, PCS can be used for quantum error mitigation (QEM) via post-selection based on the Pauli check syndrome values. Currently, PCS is leveraged in the qubit space. In this paper, we introduce a generalized approach for applying PCS-based QED and QEM to quantum information of arbitrary dimension in the Hilbert space. Each pair of these extended checks consists of a sequence of gates in the Heisenberg-Weyl operator set that extend Pauli operators into the qudit space. These qudit checks use at least one ancilla qudit to detect qudit errors that do not commute with the unitary selected for the check. We show that our proposed methods for qudit QED can detect errors of arbitrary dimensions. More specifically, we prove that an arbitrary Heisenberg-Weyl error maps deterministically to a unique ancilla readout, and further, post-selecting on the $|0 \rangle$ readout guarantees unit fidelity in the noiseless check limit. We validate these findings numerically across dimensions $d=2$ through $d=9$, achieving error-mitigated fidelities above $97.5\% $ under realistic depolarizing error rates.

quant-ph↗

arXiv2026

SEQC: Stratify-Elaborate Quantum Compilation Towards Modular Hybrid Architectures

As quantum computing technology matures, the pursuit of performance and scalability has led to the widespread adoption of modular quantum architectures. We expect that the next stage of technological evolution will integrate multiple qubit modalities into these systems, producing hybrid, modular quantum architectures. However, the complexity of hybrid, modular quantum devices, coupled with their growing sizes, presents an imminent scalability challenge for quantum compilation. Existing qubit allocation methods are often unable to contend with inter-module links, which do not necessarily support a universal basis gate set. Furthermore, these algorithms are typically not designed for qubit links of significantly varying latency or fidelity. In this work, we propose SEQC, a hierarchical parallelized compilation pipeline optimized for modular quantum systems, including several novel methods for qubit placement, qubit routing, and circuit optimization. SEQC attains a 9.3-32.3% average increase in circuit fidelity (49.99-63.36% max), depending on the chiplet size and topology. Additionally, owing to its ability to parallelize compilation, SEQC achieves 1.34-3.27$\times$ faster compilation on average (3.37-6.74$\times$ max) over a chiplet-unaware Qiskit baseline.

quant-ph↗

arXiv2026

Quantum Noise Suppression at Scale with Crosstalk-Robust Gate Sets

We introduce crosstalk-robust gate sets, which are obtained using a novel, scalable optimal control problem exploiting locality. Through the suppression of pairwise quantum crosstalk, the gate sets enable robustness that extends to multi-qubit circuits. The IBM Quantum Platform devices provide a testbed for our gate sets, where we study their efficacy via error suppression protocols and randomized parallel single-qubit circuits of up to eight qubits. Furthermore, we provide the first known assessment of the impact of complete optimal control gate sets on quantum algorithms. Using a Hamiltonian simulation of a four-qubit transverse field Ising model, we show that noise-informed gates enhance median algorithmic performance by a factor of four over baseline Gaussian gates using the same calibration procedures. Lastly, we provide numerical evidence that optimized gate sets enable larger qubit-qubit coupling strengths that can cut two-qubit gate times in half. This result confirms that hardware-software co-design using quantum optimal control can create new opportunities for quantum computing architectures.

quant-ph↗

arXiv2026

Boundaries of Acceptable Defectiveness: Redefining Surface Code Robustness under Heterogeneous Noise

A variety of past research on superconducting qubits shows that these devices exhibit considerable variation and thus cannot be accurately depicted by a uniform noise model. To combat this often unrealistic picture of homogeneous noise in quantum processors during runtime, our work aims to define the boundaries of acceptable defectiveness (BADs), or the upper boundary of a qubit's physical error, past which this defective qubit entirely degrades the logical computation and should be considered faulty and removed from the surface code mapping. Here, we present a simulation framework based on the stabilizer simulation package STIM, that allows for rapid experimentation of quantum error correction (QEC) performance under any arbitrary and unique noise model. Using this tool, QEC circuits using rotated surface codes were generated, sampled, and analyzed from distances 3 to 17, with various defective error rates and outlier defect locations. The results suggest that there are, in fact, boundaries of acceptable defectiveness in which a defective qubit, with a physical error rate $\leq 0.75$, can be left in the lattice with negligible impact on logical error rate given sufficient code distances and proper placement in the lattice. Additionally, when modeling noise as a uniform distribution, the logical error rate shows minimal impact with increasing deviation, with $σ\leq μ$. As a result, we propose that defectiveness of both individual qubits and the overall uniformity of lattice fidelity should not be viewed as all or nothing, but instead as a spectrum. Our research demonstrates how heterogeneity relates to the logical error rate and, through the framework provided, facilitates the development of preliminary goals and metrics for hardware designers to meet to achieve target logical performance with imperfect or nonuniform qubit qualities.

quant-ph↗

arXiv2026

Computer Science Challenges in Quantum Computing: Early Fault-Tolerance and Beyond

Quantum computing is entering a period in which progress will be shaped as much by advances in computer science as by improvements in hardware. The central thesis of this report is that early fault-tolerant quantum computing shifts many of the primary bottlenecks from device physics alone to computer-science-driven system design, integration, and evaluation. While large-scale, fully fault-tolerant quantum computers remain a long-term objective, near- and medium-term systems will support early fault-tolerant computation with small numbers of logical qubits and tight constraints on error rates, connectivity, latency, and classical control. How effectively such systems can be used will depend on advances across algorithms, error correction, software, and architecture. This report identifies key research challenges for computer scientists and organizes them around these four areas, each centered on a fundamental question.

quant-ph↗

arXiv2025

Heterogeneously error-corrected QRAMs

Quantum Random Access Memory (QRAM) holds the promise of enabling several large scale applications of quantum computers. However, designing fault tolerant QRAMs for large scale applications is still an open problem due to the poor error and resource scaling of current architectures. Existing protocols often overlook the need for error correcting QRAMs, which will be required for data-intensive, fault-tolerant applications. However, naively error correcting all qubits used to implement the QRAM is prohibitively resource intensive, quickly becoming infeasible for large applications. To fill this gap, we propose a novel QRAM architecture that leverages variable strength error correction. We strongly error-correct qubits that heavily influence query fidelity, and lightly correct less critical regions of the QRAM. This scheme produces queries with fidelity bounded by a constant for arbitrarily sized QRAMs without requiring improvements in physical hardware. Furthermore, the heterogeneous scheme requires 5x fewer resources (for depth 30 QRAM) and quadratically slower error scaling as compared to a uniformly error corrected Bucket Brigade QRAM. In this work, we present a rigorous analysis of the query fidelity scaling and perform resource analyses of two variations of the heterogeneous architecture using the surface code. We verify our results using numerical simulations and compare our results against several other existing QRAM techniques. Through our results, we quantitatively prove the optimal scaling of the heterogeneous architecture, paving a way for data-intensive and fault tolerant quantum applications.

quant-ph↗

arXiv2025

Extrapolating Pauli Checks for Expectation Value Estimation on Noisy Quantum Devices

Pauli Check Sandwiching (PCS) is an error detection scheme that protects quantum circuits by inserting pairs of parity checks and discarding runs that signal errors. However, each additional check introduces noise and exponentially increases sampling costs. To address these limitations, we propose Pauli Check Extrapolation (PCE), an error mitigation technique that obtains measured expectation values from circuits with different numbers of checks and, analogous to ZNE, extrapolates to the ``maximum check'' limit -- the theoretical number of checks required for unit fidelity. We test linear and exponential ansatzes, deriving the exponential form from the Markovian error model. Benchmarking PCE against ZNE on random Clifford circuits with simulated depolarizing noise shows PCE outperforming ZNE for larger circuits. On real IBM hardware, PCE achieves an accuracy of up to 99.2% (56.2% improvement over baseline), compared to ZNE's 82% accuracy (29.1% improvement over baseline), for 4-qubit circuits. To demonstrate a practical use case, we then apply PCE towards mitigating errors in classical shadow measurements. Our results show that PCE can achieve fidelities greater than the state-of-the-art Robust Shadow estimation, while significantly reducing the number of required samples by eliminating the need for a calibration procedure. We validate these findings on both fully connected topologies and simulated IBM hardware backends.

quant-ph↗

arXiv2025

QuantEM: The quantum error management compiler

As quantum computing advances toward fault-tolerant architectures, quantum error detection (QED) has emerged as a practical and scalable intermediate strategy in the transition from error mitigation to full error correction. By identifying and discarding faulty runs rather than correcting them, QED enables improved reliability with significantly lower overhead. Applying QED to arbitrary quantum circuits remains challenging, however, because of the need for manual insertion of detection subcircuits, ancilla allocation, and hardware-specific mapping and scheduling. We present QuantEM, a modular and extensible compiler designed to automate the integration of QED codes into arbitrary quantum programs. Our compiler consists of three key modules: (1) program analysis and transformation module to examine quantum programs in a QED-aware context and introduce checks and ancilla qubits, (2) error detection code integration module to map augmented circuits onto specific hardware backends, and (3) postprocessing and resource management for measurement results postprocessing and resource-efficient estimation techniques. The compiler accepts a high-level quantum circuit, a chosen error detection code, and a target hardware topology and then produces an optimized and executable circuit. It can also automatically select an appropriate detection code for the user based on circuit structure and resource estimates. QuantEM currently supports Pauli check sandwiching and Iceberg codes and is designed to support future QED schemes and hardware targets. By automating the complex QED compilation flow, this work reduces developer burden, enables fast code exploration, and ensures consistent and correct application of detection logic across architectures.

quant-ph↗

arXiv2025

Building Trust in the Quantum Cloud with Physical Unclonable Functions

As cloud-based quantum computing expands, securing access to quantum hardware is increasingly critical. We present an authentication protocol that leverages intrinsic quantum device properties to construct Quantum Physical Unclonable Functions (Q-PUFs). Using frequency fingerprints from fixed-frequency transmon qubits, we prototype our approach on IBM quantum devices with both real and simulated data. We employ fuzzy extractors to generate stable cryptographic keys that tolerate measurement noise and conceal raw hardware data. To support scalability, we introduce q tuples (qubit subsets) that enable challenge response generation for strong PUF behavior. We also outline extensions to neutral atom platforms and propose future directions including logical Q-PUFs. Our work lays the groundwork for secure, hardware-rooted authentication in hybrid quantum-classical systems.

quant-ph↗

arXiv2025

Toward Human-Quantum Computer Interaction: Interface Techniques for Usable Quantum Computing

By leveraging quantum-mechanical properties like superposition, entanglement, and interference, quantum computing (QC) offers promising solutions for problems that classical computing has not been able to solve efficiently, such as drug discovery, cryptography, and physical simulation. Unfortunately, adopting QC remains difficult for potential users like QC beginners and application-specific domain experts, due to limited theoretical and practical knowledge, the lack of integrated interface-wise support, and poor documentation. For example, to use quantum computers, one has to convert conceptual logic into low-level codes, analyze quantum program results, and share programs and results. To support the wider adoption of QC, we, as designers and QC experts, propose interaction techniques for QC through design iterations. These techniques include writing quantum codes conceptually, comparing initial quantum programs with optimized programs, sharing quantum program results, and exploring quantum machines. We demonstrate the feasibility and utility of these techniques via use cases with high-fidelity prototypes.

cs.HC↗

arXiv2024

Modeling Short-Range Microwave Networks to Scale Superconducting Quantum Computation

A core challenge for superconducting quantum computers is to scale up the number of qubits in each processor without increasing noise or cross-talk. Distributed quantum computing across small qubit arrays, known as chiplets, can address these challenges in a scalable manner. We propose a chiplet architecture over microwave links with potential to exceed monolithic performance on near-term hardware. Our methods of modeling and evaluating the chiplet architecture bridge the physical and network layers in these processors. We find evidence that distributing computation across chiplets may reduce the overall error rates associated with moving data across the device, despite higher error figures for transfers across links. Preliminary analyses suggest that latency is not substantially impacted, and that at least some applications and architectures may avoid bottlenecks around chiplet boundaries. In the long-term, short-range networks may underlie quantum computers just as local area networks underlie classical datacenters and supercomputers today.

quant-ph↗

arXiv2024

Dynamic Resource Allocation with Quantum Error Detection

Quantum processing units (QPUs) are highly heterogeneous in terms of physical qubit performance. To add even more complexity, drift in quantum noise landscapes has been well-documented. This makes resource allocation a challenging problem whenever a quantum program must be mapped to hardware. As a solution, we propose a novel resource allocation framework that applies Pauli checks. Pauli checks have demonstrated their efficacy at error mitigation in prior work, and in this paper, we highlight their potential to infer the noise characteristics of a quantum system. Circuits with embedded Pauli checks can be executed on different regions of qubits, and the syndrome data created by error-detecting Pauli checks can be leveraged to guide quantum program outcomes toward regions that produce higher-fidelity final distributions. Using noisy simulation and a real QPU testbed, we show that dynamic quantum resource allocation with Pauli checks can outperform state-of-art mapping techniques, such as those that are noise-aware. Further, when applied toward the Quantum Approximate Optimization Algorithm, techniques guided by Pauli checks demonstrate the ability to increase circuit fidelity 11% on average, and up to 33%.

quant-ph↗

arXiv2024

Interaction Techniques for User-friendly Interfaces for Gate-based Quantum Computing

Quantum computers offer promising approaches to various fields. To use current noisy quantum computers, developers need to examine the compilation of a logical circuit, the status of available hardware, and noises in results. As those tasks are less common in classical computing, quantum developers may not be familiar with performing them. Therefore, easier and more intuitive interfaces are necessary to make quantum computers more approachable. While existing notebook-based toolkits like Qiskit offer application programming interfaces and visualization techniques, it is still difficult to navigate the vast space of quantum program design and hardware status. Inspired by human-computer interaction (HCI) work in data science and visualization, our work introduces four user interaction techniques that can augment existing notebook-based toolkits for gate-based quantum computing: (1) a circuit writer that lets users provide high-level information about a circuit and generates a code snippet to build it; (2) a machine explorer that provides detailed properties and configurations of a hardware with a code to load selected information; (3) a circuit viewer that allows for comparing logical circuit, compiled circuit, and hardware configurations; and (4) a visualization for adjusting measurement outcomes with hardware error rates.

cs.HC↗

arXiv2024

Quantum Vulnerability Analysis to Accurate Estimate the Quantum Algorithm Success Rate

While quantum computers provide exciting opportunities for information processing, they currently suffer from noise during computation that is not fully understood. Incomplete noise models have led to discrepancies between quantum program success rate (SR) estimates and actual machine outcomes. For example, the estimated probability of success (ESP) is the state-of-the-art metric used to gauge quantum program performance. The ESP suffers poor prediction since it fails to account for the unique combination of circuit structure, quantum state, and quantum computer properties specific to each program execution. Thus, an urgent need exists for a systematic approach that can elucidate various noise impacts and accurately and robustly predict quantum computer success rates, emphasizing application and device scaling. In this article, we propose quantum vulnerability analysis (QVA) to systematically quantify the error impact on quantum applications and address the gap between current success rate (SR) estimators and real quantum computer results. The QVA determines the cumulative quantum vulnerability (CQV) of the target quantum computation, which quantifies the quantum error impact based on the entire algorithm applied to the target quantum machine. By evaluating the CQV with well-known benchmarks on three 27-qubit quantum computers, the CQV success estimation outperforms the estimated probability of success state-of-the-art prediction technique by achieving on average six times less relative prediction error, with best cases at 30 times, for benchmarks with a real SR rate above 0.1%. Direct application of QVA has been provided that helps researchers choose a promising compiling strategy at compile time.

quant-ph↗

arXiv2024

Codesign of quantum error-correcting codes and modular chiplets in the presence of defects

Fabrication errors pose a significant challenge in scaling up solid-state quantum devices to the sizes required for fault-tolerant (FT) quantum applications. To mitigate the resource overhead caused by fabrication errors, we combine two approaches: (1) leveraging the flexibility of a modular architecture, (2) adapting the procedure of quantum error correction (QEC) to account for fabrication defects. We simulate the surface code adapted to qubit arrays with arbitrarily distributed defects to find metrics that characterize how defects affect fidelity. We then determine the impact of defects on the resource overhead of realizing a fault-tolerant quantum computer, on a chiplet-based modular architecture. Our strategy for dealing with fabrication defects demonstrates an exponential suppression of logical failure where error rates of non-faulty physical qubits are ~0.1% in a circuit-based noise model. This is a typical regime where we imagine running the defect-free surface code. We use our numerical results to establish post-selection criteria for building a device from defective chiplets. Using our criteria, we then evaluate the resource overhead in terms of the average number of fabricated physical qubits per logical qubit. We find that an optimal choice of chiplet size, based on the defect rate and target fidelity, is essential to limiting any additional error correction overhead due to defects. When the optimal chiplet size is chosen, at a defect rate of 1% the resource overhead can be reduced to below 3X and 6X respectively for the two defect models we use, for a wide range of target performance. We also determine cutoff fidelity values that help identify whether a qubit should be disabled or kept as part of the error correction code.

quant-ph↗

arXiv2024

Average circuit eigenvalue sampling on NISQ devices

Average circuit eigenvalue sampling (ACES) was introduced by Flammia in arXiv:2108.05803 as a protocol to characterize the Pauli error channels of individual gates across the device simultaneously. The original paper posed using ACES to characterize near-term devices as an open problem. This work advances in this direction by presenting a full implementation of ACES for real devices and deploying it to Superstaq arXiv:2309.05157, along with a device-tailored resource estimation obtained through simulations and experiments. Our simulations show that ACES is able to estimate one- and two-qubit non-uniform Pauli error channels to an average eigenvalue absolute error of under $0.003$ and total variation distance of under 0.001 between simulated and reconstructed probability distributions over Pauli errors with $10^5$ shots per circuit using 5 circuits of depth 14. The question of estimating general error channels through twirling techniques in real devices remains open, as it is dependent on a device's native gates, but simulations with the Clifford set show results in agreement with reported hardware data. Experimental results on IBM's Algiers and Osaka devices are presented, where we characterize their error channels as Pauli channels without twirling.

quant-ph↗

arXiv2024

VarSaw: Application-tailored Measurement Error Mitigation for Variational Quantum Algorithms

For potential quantum advantage, Variational Quantum Algorithms (VQAs) need high accuracy beyond the capability of today's NISQ devices, and thus will benefit from error mitigation. In this work we are interested in mitigating measurement errors which occur during qubit measurements after circuit execution and tend to be the most error-prone operations, especially detrimental to VQAs. Prior work, JigSaw, has shown that measuring only small subsets of circuit qubits at a time and collecting results across all such subset circuits can reduce measurement errors. Then, running the entire (global) original circuit and extracting the qubit-qubit measurement correlations can be used in conjunction with the subsets to construct a high-fidelity output distribution of the original circuit. Unfortunately, the execution cost of JigSaw scales polynomially in the number of qubits in the circuit, and when compounded by the number of circuits and iterations in VQAs, the resulting execution cost quickly turns insurmountable. To combat this, we propose VarSaw, which improves JigSaw in an application-tailored manner, by identifying considerable redundancy in the JigSaw approach for VQAs: spatial redundancy across subsets from different VQA circuits and temporal redundancy across globals from different VQA iterations. VarSaw then eliminates these forms of redundancy by commuting the subset circuits and selectively executing the global circuits, reducing computational cost (in terms of the number of circuits executed) over naive JigSaw for VQA by 25x on average and up to 1000x, for the same VQA accuracy. Further, it can recover, on average, 45% of the infidelity from measurement errors in the noisy VQA baseline. Finally, it improves fidelity by 55%, on average, over JigSaw for a fixed computational budget. VarSaw can be accessed here: https://github.com/siddharthdangwal/VarSaw.

quant-ph↗