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Keito Kobayashi

Publications and source records attributed to Keito Kobayashi.

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Voltage-insensitive stochastic magnetic tunnel junctions with double free layers

Stochastic magnetic tunnel junctions (s-MTJ) is a promising component of probabilistic bit (p-bit), which plays a pivotal role in probabilistic computers. For a standard cell structure of the p-bit, s-MTJ is desired to be insensitive to voltage across the junction over several hundred millivolts. In conventional s-MTJs with a reference layer having a fixed magnetization direction, however, the stochastic output significantly varies with the voltage due to spin-transfer torque (STT) acting on the stochastic free layer. In this work, we study a s-MTJ with a "double-free-layer" design theoretically proposed earlier, in which the fixed reference layer of the conventional structure is replaced by another stochastic free layer, effectively mitigating the influence of STT on the stochastic output. We show that the key device property characterized by the ratio of relaxation times between the high- and low-resistance states is one to two orders of magnitude less sensitive to bias voltage variations compared to conventional s-MTJs when the top and bottom free layers are designed to possess the same effective thickness. This work opens a pathway for reliable, nanosecond-operation, high-output, and scalable spintronics-based p-bits.

cond-mat.mes-hall

CMOS + stochastic nanomagnets: heterogeneous computers for probabilistic inference and learning

Extending Moore's law by augmenting complementary-metal-oxide semiconductor (CMOS) transistors with emerging nanotechnologies (X) has become increasingly important. One important class of problems involve sampling-based Monte Carlo algorithms used in probabilistic machine learning, optimization, and quantum simulation. Here, we combine stochastic magnetic tunnel junction (sMTJ)-based probabilistic bits (p-bits) with Field Programmable Gate Arrays (FPGA) to create an energy-efficient CMOS + X (X = sMTJ) prototype. This setup shows how asynchronously driven CMOS circuits controlled by sMTJs can perform probabilistic inference and learning by leveraging the algorithmic update-order-invariance of Gibbs sampling. We show how the stochasticity of sMTJs can augment low-quality random number generators (RNG). Detailed transistor-level comparisons reveal that sMTJ-based p-bits can replace up to 10,000 CMOS transistors while dissipating two orders of magnitude less energy. Integrated versions of our approach can advance probabilistic computing involving deep Boltzmann machines and other energy-based learning algorithms with extremely high throughput and energy efficiency.

cond-mat.mes-hall