arXiv subjects

Kevin van Hoogdalem

Publications and source records attributed to Kevin van Hoogdalem.

4 recordsLinked to original sources

arXiv2026

20 Second Parity Lifetime in an InAs--Pb Tetron Device

A central promise of topological quantum computing is that increasing the excitation gap improves device performance significantly. Here, we experimentally validate this principle in an InAs--Pb tetron device via interferometric single-shot parity measurements. By replacing aluminum with the higher-gap superconductor lead in our superconductor-semiconductor hybrid devices, we have improved the robustness of our topological phase. In addition, to enable fast and precise bring-up at scale, we have developed an rf measurement technique that resolves low-energy wire-end states and directly measures their energy splitting with $μ\text{eV}$ precision. We employ this technique to bring up a device in a multi-tetron array and perform parity measurements of one of the tetron's hybrid nanowires (NWs). By controllably switching the wire parity, we observe $h/2e$-periodic bimodal shifts in the quantum capacitance of a quantum dot coupled to the hybrid nanowire in an interference loop. Further time-resolved measurements reveal a characteristic parity switching time of $\sim 20$ s with some instances reaching minute-scale. Such extremely long parity lifetimes are orders of magnitude longer than typical qubit operation times, which are on the order of $μ\text{s}$. Finally, we discuss potential implications for the fidelity of Pauli measurements.

cond-mat.mes-hall↗

arXiv2025

Distinct Lifetimes for $X$ and $Z$ Loop Measurements in a Majorana Tetron Device

We present a hardware realization and measurements of a tetron qubit device in a superconductor-semiconductor heterostructure. The device architecture contains two parallel superconducting nanowires, which support four Majorana zero modes (MZMs) when tuned into the topological phase, and a trivial superconducting backbone. Two distinct readout interferometers are formed by connecting the superconducting structure to a series of quantum dots. We perform single-shot interferometric measurements of the fermion parity for the two loops, designed to implement Pauli-$X$ and $Z$ measurements of the tetron. Performing repeated single-shot measurements yields two widely separated time scales $τ_X = 14.5\pm 0.3 \, \mathrm{μs}$ and $τ_Z = 12.4\pm 0.4\, \mathrm{ms}$ for parity switches observed in the $X$ and $Z$ measurement loops, which we attribute to intra-wire parity switches and external quasiparticle poisoning, respectively. We estimate assignment errors of $\mathrm{err}^X_a=16\%$ and $\mathrm{err}^Z_a=0.5\%$ for $X$ and $Z$ measurement-based operations, respectively.

cond-mat.mes-hall↗

arXiv2020

Single-shot fabrication of semiconducting-superconducting nanowire devices

Semiconducting-superconducting nanowires attract widespread interest owing to the possible presence of non-abelian Majorana zero modes, which hold promise for topological quantum computation. However, the search for Majorana signatures is challenging because reproducible hybrid devices with desired nanowire lengths and material parameters need to be reliably fabricated to perform systematic explorations in gate voltages and magnetic fields. Here, we exploit a fabrication platform based on shadow walls that enables the in-situ, selective and consecutive depositions of superconductors and normal metals to form normal-superconducting junctions. Crucially, this method allows to realize devices in a single shot, eliminating fabrication steps after the synthesis of the fragile semiconductor/superconductor interface. At the atomic level, all investigated devices reveal a sharp and defect-free semiconducting-superconducting interface and, correspondingly, we measure electrically a hard induced superconducting gap. While our advancement is of crucial importance for enhancing the yield of complex hybrid devices, it also offers a straightforward route to explore new material combinations for hybrid devices.

cond-mat.mes-hall↗

arXiv2020

Shadow-wall lithography of ballistic superconductor-semiconductor quantum devices

The realization of a topological qubit calls for advanced techniques to readily and reproducibly engineer induced superconductivity in semiconductor nanowires. Here, we introduce an on-chip fabrication paradigm based on shadow walls that offers substantial advances in device quality and reproducibility. It allows for the implementation of novel quantum devices and ultimately topological qubits while eliminating many fabrication steps such as lithography and etching. This is critical to preserve the integrity and homogeneity of the fragile hybrid interfaces. The approach simplifies the reproducible fabrication of devices with a hard induced superconducting gap and ballistic normal-/superconductor junctions. Large gate-tunable supercurrents and high-order multiple Andreev reflections manifest the exceptional coherence of the resulting nanowire Josephson junctions. Our approach enables, in particular, the realization of 3-terminal devices, where zero-bias conductance peaks emerge in a magnetic field concurrently at both boundaries of the one-dimensional hybrids.

cond-mat.mes-hall↗