arXiv subjects

Konstantin Evchenko

Publications and source records attributed to Konstantin Evchenko.

2 recordsLinked to original sources

arXiv2017

A Novel Scheduling Framework Leveraging Hardware Cache Partitioning for Cache-Side-Channel Elimination in Clouds

While there exist many isolation mechanisms that are available to cloud service providers, including virtual machines, containers, etc., the problem of side-channel increases in importance as a remaining security vulnerability, particularly in the presence of shared caches and multicore processors. In this paper we present a hardware-software mechanism that improves the isolation of cloud processes in the presence of shared caches on multicore chips. Combining the Intel CAT architecture that enables cache partitioning on the fly with novel scheduling techniques and state cleansing mechanisms, we enable cache-side-channel free computing for Linux-based containers and virtual machines, in particular, those managed by KVM. We do a preliminary evaluation of our system using a CPU bound workload. Our system allows Simultaneous Multithreading (SMT) to remain enabled and does not require application level changes.

cs.CR↗

arXiv2017

End-to-End Network Delay Guarantees for Real-Time Systems using SDN

We propose a novel framework that reduces the management and integration overheads for real-time network flows by leveraging the capabilities (especially global visibility and management) of software-defined networking (SDN) architectures. Given the specifications of flows that must meet hard real-time requirements, our framework synthesizes paths through the network and associated switch configurations - to guarantee that these flows meet their end-to-end timing requirements. In doing so, our framework makes SDN architectures "delay-aware" - remember that SDN is otherwise not able to reason about delays. Hence, it is easier to use such architectures in safety-critical and other latency-sensitive applications. We demonstrate our principles as well as the feasibility of our approach using both - exhaustive simulations as well as experiments using real hardware switches.

cs.NI↗