arXiv subjects

Korbinian Staudacher

Publications and source records attributed to Korbinian Staudacher.

9 recordsLinked to original sources

arXiv2026

Adaptive Framework for Failure-Aware Protocols in Fusion-Based Graph-State Generation

We consider the generation of photonic graph states in a linear optics setting where sequential non-deterministic fusion measurements are used to build large graph states out of small linear clusters and develop a framework to optimize the building process using graph theoretic characterizations of fusion networks. We present graph state generation protocols for linear cluster resource states and Type-I/Type-II fusions which are adaptive to fusion failure, that is, they reuse leftover graph states in the remaining building process. To estimate hardware costs, we interpret our protocols as finite Markov processes. This viewpoint allows to cast the expected number of fusion measurements until success as a first passage problem. We then deploy a pipeline of polynomial algorithms to optimize arbitrary graph states, extract fusion networks and find beneficial orderings of fusions with the goal of lowering the corresponding mean first passage times. We evaluate our pipeline for different initial resource states and fusion mechanisms with varying success probabilities. Results show reductions in the fusion overhead by several orders of magnitude when compared to simple repeat until success protocols and by up to 40% when compared to state-of-the-art graph state generation protocols, especially for realistic fusion success probabilities between 50-75%.

quant-ph↗

arXiv2026

Highly-Parallel Atom-Detection Accelerator for Tweezer-Based Neutral Atom Quantum Computers

Neutral atom quantum computers (NAQCs) are among the most promising computational platforms for quantum computing. Controlling and measuring individual atoms and their states, which often requires multiple imaging and image-analysis procedures, is typically the most time-consuming task during computation and contributes significantly to overall cycle times. To resolve this challenge, we propose a highly-parallel atom-detection accelerator for tweezer-based NAQCs. Our design builds on an existing state-reconstruction method and combines an algorithm-level optimization with a Field Programmable Gate Array (FPGA) implementation to maximize parallelism and reduce the run time of the image-analysis process. We identify and overcome several challenges for an FPGA implementation, such as introducing a prefetching mechanism to improve scalability and customizing bus transfers to support large bandwidths. Tested on a Xilinx UltraScale+ FPGA, our design can analyze a 256x256-pixel fluorescence image in just 115mus, achieving 34.9x and 6.3x speedups over the original and optimized CPU baseline, respectively. Moreover, our accelerator can maintain consistent resource utilization across various atom array sizes, contributing to the ongoing efforts toward scalable and fully integrated FPGA-based control systems for NAQCs.

quant-ph↗

arXiv2026

Efficient Image Reconstruction Architecture for Neutral Atom Quantum Computing

In recent years, neutral atom quantum computers (NAQCs) have attracted a lot of attention, primarily due to their long coherence times and good scalability. One of their main drawbacks is their comparatively time-consuming control overhead, with one of the main contributing procedures being the detection of individual atoms and measurement of their states, each occurring at least once per compute cycle and requiring fluorescence imaging and subsequent image analysis. To reduce the required time budget, we propose a highly-parallel atom-detection accelerator for tweezer-based NAQCs. Building on an existing solution, our design combines algorithm-level optimization with a field-programmable gate array (FPGA) implementation to maximize parallelism and reduce the run time of the image analysis process. Our design can analyze a 256$\times$256-pixel image representing a 10$\times$10 atom array in just 115 $μ$s on a Xilinx UltraScale+ FPGA. Compared to the original CPU baseline and our optimized CPU version, we achieve about 34.9$\times$ and 6.3$\times$ speedup of the reconstruction time, respectively. Moreover, this work also contributes to the ongoing efforts toward fully integrated FPGA-based control systems for NAQCs.

quant-ph↗

arXiv2026

Alternating ZX Circuit Extraction for Hardware-Adaptive Compilation

We present a novel quantum circuit extraction scheme that tightly integrates graph-like ZX diagrams with hardware-adaptive routing. The method utilizes the degrees of freedom during the conversion from a ZX diagram to a quantum circuit (extraction). It alternates between generating multiple extraction options and evaluating them based on hardware constraints, allowing the routing algorithm to inform and guide the extraction process. This feedback loop extends existing graph-like ZX extraction and supports modular integration of different extraction algorithms, routing strategies, and target hardware, making it a versatile building block during compilation. To perform numerical evaluations, a reference instance of the scheme is implemented with SWAP-based routing for neutral atom hardware and evaluated using various benchmark collections on small-to mid-scale circuits. The reference code is available as open-source, allowing fast integration of other extraction and/or routing tools to stimulate further research and foster improvements of the proposed scheme.

quant-ph↗

arXiv2025

Teaching quantum computing to computer science students: Review of a hands-on quantum circuit simulation practical

We present a practical course targeting graduate students with prior knowledge of the basics of quantum computing. The practical aims to deepen students' understanding of fundamental concepts in quantum computing by implementing quantum circuit simulators. Through hands-on experience, students learn about different methods to simulate quantum computing, including state vectors, density matrices, the stabilizer formalism, and matrix product states. By implementing the simulation methods themselves, students develop a more in-depth understanding of fundamental concepts in quantum computing, including superposition, entanglement, and the effects of noise on quantum systems. This hands-on experience prepares students to do research in the field of quantum computing and equips them with the knowledge and skills necessary to tackle complex research projects in the field. In this work, we describe our teaching approach and the structure of our practical, and we discuss evaluations and lessons learned.

physics.ed-ph↗

arXiv2025

Q-BEAST: A Practical Course on Experimental Evaluation and Characterization of Quantum Computing Systems

Quantum computing (QC) promises to be a transformative technology with impact on various application domains, such as optimization, cryptography, and material science. However, the technology has a sharp learning curve, and practical evaluation and characterization of quantum systems remains complex and challenging, particularly for students and newcomers from computer science to the field of quantum computing. To address this educational gap, we introduce Q-BEAST, a practical course designed to provide structured training in the experimental analysis of quantum computing systems. Q-BEAST offers a curriculum that combines foundational concepts in quantum computing with practical methodologies and use cases for benchmarking and performance evaluation on actual quantum systems. Through theoretical instruction and hands-on experimentation, students gain experience in assessing the advantages and limitations of real quantum technologies. With that, Q-BEAST supports the education of a future generation of quantum computing users and developers. Furthermore, it also explicitly promotes a deeper integration of High Performance Computing (HPC) and QC in research and education.

physics.ed-ph↗

arXiv2024

Multi-controlled Phase Gate Synthesis with ZX-calculus applied to Neutral Atom Hardware

Quantum circuit synthesis describes the process of converting arbitrary unitary operations into a gate sequence of a fixed universal gate set, usually defined by the operations native to a given hardware platform. Most current synthesis algorithms are designed to synthesize towards a set of single qubit rotations and an additional entangling two qubit gate, such as CX, CZ, or the Molmer Sorensen gate. However, with the emergence of neutral atom based hardware and their native support for gates with more than two qubits, synthesis approaches tailored to these new gate sets become necessary. In this work, we present an approach to synthesize multi controlled phase gates using ZX calculus. By representing quantum circuits as graph like ZX diagrams, one can utilize the distinct graph structure of diagonal gates to identify multi controlled phase gates inherently present in some quantum circuits even if none were explicitly defined in the original circuit. We evaluate the approach on a wide range of benchmark circuits and compare them to the standard Qiskit synthesis regarding its circuit execution time for neutral atom based hardware with native support of multi controlled gates. Our results show possible advantages for current state of the art hardware and represent the first exact synthesis algorithm supporting arbitrary sized multi controlled phase gates.

quant-ph↗

arXiv2023

Reducing 2-QuBit Gate Count for ZX-Calculus based Quantum Circuit Optimization

In the near term, programming quantum computers will remain severely limited by low quantum volumes. Therefore, it is desirable to implement quantum circuits with the fewest resources possible. For the common Clifford+T circuits, most research is focused on reducing the number of T gates, since they are an order of magnitude more expensive than Clifford gates in quantum error corrected encoding schemes. However, this optimization sometimes leads to more 2-qubit gates, which, even though they are less expensive in terms of fault-tolerance, contribute significantly to the overall circuit cost. Approaches based on the ZX-calculus have recently gained some popularity in the field, but reduction of 2-qubit gates is not their focus. In this work, we present an alternative for improving 2-qubit gate count of a quantum circuit with the ZX-calculus by using heuristics in ZX-diagram simplification. Our approach maintains the good reduction of the T gate count provided by other strategies based on ZX-calculus, thus serving as an extension for other optimization algorithms. Our results show that combining the available ZX-calculus-based optimizations with our algorithms can reduce the number of 2-qubit gates by as much as 40% compared to current approaches using ZX-calculus. Additionally, we improve the results of the best currently available optimization technique of Nam et. al for some circuits by up to 15%.

cs.CE↗

arXiv2022

A compiler for universal photonic quantum computers

Photons are a natural resource in quantum information, and the last decade showed significant progress in high-quality single photon generation and detection. Furthermore, photonic qubits are easy to manipulate and do not require particularly strongly sealed environments, making them an appealing platform for quantum computing. With the one-way model, the vision of a universal and large-scale quantum computer based on photonics becomes feasible. In one-way computing, the input state is not an initial product state, but a so-called cluster state. A series of measurements on the cluster state's individual qubits and their temporal order, together with a feed-forward procedure, determine the quantum circuit to be executed. We propose a pipeline to convert a QASM circuit into a graph representation named measurement-graph (m-graph), that can be directly translated to hardware instructions on an optical one-way quantum computer. In addition, we optimize the graph using ZX-Calculus before evaluating the execution on an experimental discrete variable photonic platform.

quant-ph↗