arXiv subjects

Kwan-Ho Kim

Publications and source records attributed to Kwan-Ho Kim.

12 recordsLinked to original sources

arXiv2025

Reconfigurable, non-volatile control of optical anisotropy in ReS2 via ferroelectric gating

Electrically tunable linear dichroism (LD) with non-volatile properties represents a critical yet elusive feature for next-generation integrated photonic elements in practical device architectures. Here, we demonstrate record-breaking, non-volatile control of optical anisotropy in two-dimensional ReS2 via ferroelectric gating with aluminum scandium nitride (AlScN). Our ferroelectric field-effect transistors achieve near-unity (~95%) LD tunability of differential reflectance at room temperature--the highest reported for any electrically controlled 2D optical system. Crucially, the programmed optical states exhibit exceptional retention exceeding 12,000 seconds without applied bias, enabling true non-volatile optical memory. Through combined experimental characterization and ab initio calculations, we reveal that ferroelectric polarization switching induces substantial asymmetric charge transfer to ReS2, selectively populating conduction band states and triggering structural distortions that dramatically enhance optical anisotropy in the "up" polarization state while leaving the "down" state unperturbed. This ferroelectric-semiconductor coupling provides a universal platform for voltage-programmable, energy-efficient photonic devices with dynamic polarization control, addressing critical needs in integrated photonics as well as programmable far-field optics and telecommunications infrastructure.

physics.optics↗

arXiv2025

Kilobyte-Scale, Selector-Free, Temperature-Hard AlScN Ferroelectric Diode Crossbar Arrays

We report the fabrication and characterization of kilobyte-scale, selector-free, ferroelectric (FE) diode crossbar memory arrays based on aluminum scandium nitride (AlScN). Utilizing a fully CMOS back-end-of-line (BEOL) compatible process, we fabricated 2-kilobyte (128 $\times$ 128) arrays with device diameters down to 5 $\mu$m, achieving memory densities up to 2500 bits/mm$^2$. Large-scale electrical characterization across 1000 randomly selected devices reveals a yield rate of 95.2%, a tight switching voltage distribution with a coefficient of variation (CV) of 0.003, and consistent on/off ratios of around 10 with a CV of 0.27. We demonstrate selector-free read and program operations of the array, enabled by the high nonlinearity, rectification, and uniform switching behavior of the FE diodes. Furthermore, we verified consistent ferroelectric switching during array operation at temperatures up to 600 $^\circ$C. Our results highlight the potential of AlScN FE diode arrays for energy-efficient, high-density memory applications and lay the groundwork for future integration in compute-near-memory, high-temperature memory, and analog compute-in-memory systems.

cond-mat.mes-hall↗

arXiv2025

Demonstration of highly scaled AlScN ferroelectric diode memory with storage density > 100 Mbit/mm$^2$

Wurtzite nitride ferroelectric materials have emerged as promising candidates for next-generation memory applications due to their exceptional polarization properties and compatibility with conventional semiconductor processing techniques. Here, we demonstrate the first successful areal scaling of Aluminum Scandium Nitride (AlScN) ferroelectric diode (FeDiode) memory down to 40 nm device diameters while maintaining ON/OFF > 60. Using a 20 nm thick Al0.64Sc0.36N ferroelectric layer, we evaluate both metal-insulator-ferroelectric-metal (MIFM) and metal-ferroelectric-metal (MFM) architectures for scaled resistive memory devices. Our scaled devices exhibit an enhanced breakdown-to-coercive field ratio exceeding 2.6 due to increased breakdown field. The MIFM devices demonstrate stable 3-bit non-volatile multistate behavior with clearly distinguishable resistance states and retention exceeding 4*10^4 seconds at 85 C. By achieving more than a million-fold areal scaling with enhanced performance metrics, this work establishes AlScN-based FeDiode memory as a highly promising platform for non-volatile storage with potential for direct integration into CMOS technology.

cond-mat.mes-hall↗

arXiv2024

Reconfigurable SWCNT ferroelectric field-effect transistor arrays

Reconfigurable devices have garnered significant attention for alleviating the scaling requirements of conventional CMOS technology, as they require fewer components to construct circuits with similar function. Prior works required continuous voltage application for programming gate terminal(s) in addition to the primary gate terminal, which undermines the advantages of reconfigurable devices in realizing compact and power-efficient integrated circuits. Here, we realize reconfigurable devices based on a single-gate field-effect transistor (FET) architecture by integrating semiconducting channels consisting of a monolayer film of highly aligned SWCNTs with a ferroelectric AlScN gate dielectric, all compatible with CMOS back-end-of-line (BEOL) processing. We demonstrated these SWCNT ferroelectric FETs (FeFETs) in a centimeter-scale array (~1 cm^2) comprising ~735 devices, with high spatial uniformity in device characteristics across the array. The devices exhibited ambipolar transfer characteristics with high on-state currents and current on/off ratios exceeding 10^5, demonstrating an excellent balance between electron and hole conduction (~270 μA/μm at a drain voltage of 3 V. When functioning as a non-volatile memory, the SWCNT FeFETs demonstrated large memory windows of 0.26 V/nm and 0.08 V/nm in the hole and electron conduction regions, respectively, combined with excellent retention behavior for up to 10^4 s. Repeated reconfiguration between p-FET and n-FET modes was also enabled by switching the spontaneous polarization in AlScN and operating the transistor within a voltage range below the coercive voltage. We revealed through circuit simulations that reconfigurable SWCNT transistors can realize ternary content-addressable memory (TCAM) with far fewer devices compared to circuits based on silicon CMOS technology or based on resistive non-volatile devices.

cond-mat.mtrl-sci↗

arXiv2024

High-Performance Ferroelectric Field-Effect Transistors with Ultra-High Current and Carrier Densities

Ferroelectric field-effect transistors (FeFET) with two-dimensional (2D) semiconductor channels are promising low-power, embedded non-volatile memory (NVM) candidates for next-generation in-memory computing. However, the performance of FeFETs can be limited by a charge imbalance between the ferroelectric layer and the channel, and for low-dimensional semiconductors, also by a high contact resistance between the metal electrodes and the channel. Here, we report a significant enhancement in performance of contact-engineered FeFETs with a 2D MoS2 channel and a ferroelectric Al0.68Sc0.32N (AlScN) gate dielectric. Replacing Ti with In contact electrodes results in a fivefold increase in on-state current (~120 uA/um at 1 V) and on-to-off ratio (~2*10^7) in the FeFETs. In addition, the high carrier concentration in the MoS2 channel during the on-state (> 10^14 cm^-2) facilitates the observation of a metal-to-insulator phase transition in monolayer MoS2 permitting observation of high field effect mobility (> 100 cm^2V^-1s^-1) at cryogenic temperatures. Our work and devices broaden the potential of FeFETs and provides a unique platform to implement high-carrier-density transport in a 2D channel.

physics.app-ph↗

arXiv2024

Multi-State, Ultra-thin, BEOL-Compatible AlScN Ferroelectric Diodes

The growth in data generation necessitates efficient data processing technologies to address the von Neumann bottleneck in conventional computer architecture. Memory-driven computing, which integrates non-volatile memory (NVM) devices in a 3D stack, is gaining attention, with CMOS back-end-of-line (BEOL) compatible ferroelectric (FE) diodes being ideal due to their two-terminal design and inherently selector-free nature, facilitating high-density crossbar arrays. Here, we demonstrate BEOL-compatible, high-performance FE-diodes scaled to 5, 10, and 20 nm FE Al0.72Sc0.28N/Al0.64Sc0.36N films. Through interlayer (IL) engineering, we show substantial improvements in the ON/OFF ratios (>166 times) and rectification ratios (>176 times) in these scaled devices. The superlative characteristics also enables 5-bit multi-state operation with a stable retention. We also experimentally and theoretically demonstrate the counterintuitive result that the inclusion of an IL can lead to a decrease in the ferroelectric switching voltage of the device. An in-depth analysis into the device transport mechanisms is performed, and our compact model aligns seamlessly with the experimental results. Our results suggest the possibility of using scaled AlxSc1-xN FE-diodes for high performance, low-power, embedded NVM.

cond-mat.mtrl-sci↗

arXiv2023

Non-Volatile Control of Valley Polarized Emission in 2D WSe2-AlScN Heterostructures

Achieving robust and electrically controlled valley polarization in monolayer transition metal dichalcogenides (ML-TMDs) is a frontier challenge for realistic valleytronic applications. Theoretical investigations show that integration of 2D materials with ferroelectrics is a promising strategy; however, its experimental demonstration has remained elusive. Here, we fabricate ferroelectric field-effect transistors using a ML-WSe2 channel and a AlScN ferroelectric dielectric, and experimentally demonstrate efficient tuning as well as non-volatile control of valley polarization. We measured a large array of transistors and obtained a maximum valley polarization of ~27% at 80 K with stable retention up to 5400 secs. The enhancement in the valley polarization was ascribed to the efficient exciton-to-trion (X-T) conversion and its coupling with an out-of-plane electric field, viz. the quantum-confined Stark effect. This changes the valley depolarization pathway from strong exchange interactions to slow spin-flip intervalley scattering. Our research demonstrates a promising approach for achieving non-volatile control over valley polarization and suggests new design principles for practical valleytronic devices.

cond-mat.mes-hall↗

arXiv2023

Scalable and Stable Ferroelectric Non-Volatile Memory at > 500 $^\circ$C

Non-volatile memory (NVM) devices that reliably operate at temperatures above 300 $^\circ$C are currently non-existent and remains a critically unmet challenge in the development of high-temperature (T) resilient electronics, necessary for many emerging, complex computing and sensing in harsh environments. Ferroelectric Al$_x$Sc$_{1-x}$N exhibits strong potential for utilization in NVM devices operating at very high temperatures (> 500 $^\circ$C) given its stable and high remnant polarization (PR) above 100 $μ$C/cm$^2$ with demonstrated ferroelectric transition temperature (TC) > 1000 $^\circ$C. Here, we demonstrate an Al$_{0.68}$Sc$_{0.32}$N ferroelectric diode based NVM device that can reliably operate with clear ferroelectric switching up to 600 $^\circ$C with distinguishable On and Off states. The coercive field (EC) from the Pulsed I-V measurements is found to be -5.84 (EC-) and +5.98 (EC+) (+/- 0.1) MV/cm at room temperature (RT) and found to decrease with increasing temperature up to 600 $^\circ$C. The devices exhibit high remnant polarizations (> 100 $μ$C/cm$^2$) which are stable at high temperatures. At 500 $^\circ$C, our devices show 1 million read cycles and stable On-Off ratio above 1 for > 6 hours. Finally, the operating voltages of our AlScN ferrodiodes are < 15 V at 600 $^\circ$C which is well matched and compatible with Silicon Carbide (SiC) based high temperature logic technology, thereby making our demonstration a major step towards commercialization of NVM integrated high-T computers.

physics.app-ph↗

arXiv2023

MoS$_{2}$/Al$_{0.68}$Sc$_{0.32}$N negative capacitance field-effect transistors

Al$_{0.68}$Sc$_{0.32}$N (AlScN) has gained attention for its outstanding ferroelectric properties, including a high coercive field and high remnant polarization. Although AlScN-based ferroelectric field-effect transistors (FETs) for memory applications have been demonstrated, a device for logic applications with minimal hysteresis has not been reported. This study reports on the transport characteristics of a MoS$_{2}$ negative capacitance FET (NCFET) based on an AlScN ferroelectric material. We experimentally demonstrate the effect of a dielectric layer in the gate stack on the memory window and subthreshold swing (SS) of the NCFET. We show that the hysteresis behavior of transfer characteristics in the NCFET can be minimized with the inclusion of a non-ferroelectric dielectric layer, which fulfills the capacitance-matching condition. Remarkably, we also observe the NC effect in MoS$_{2}$/AlScN NCFETs arrays based on large-area monolayer MoS$_{2}$ synthesized by chemical vapor deposition, showing the SS values smaller than its thermionic limit (~36-60 mV/dec) and minimal variation in threshold voltages (< 20 mV).

cond-mat.mtrl-sci↗

arXiv2022

High Density, Localized Quantum Emitters in Strained 2D Semiconductors

Two-dimensional chalcogenide semiconductors have recently emerged as a host material for quantum emitters of single photons. While several reports on defect and strain-induced single photon emission from 2D chalcogenides exist, a bottom-up, lithography-free approach to producing a high density of emitters remains elusive. Further, the physical properties of quantum emission in the case of strained 2D semiconductors are far from being understood. Here, we demonstrate a bottom-up, scalable, and lithography-free approach to creating large areas of localized emitters with high density (~150 emitters/um2) in a WSe2 monolayer. We induce strain inside the WSe2 monolayer with high spatial density by conformally placing the WSe2 monolayer over a uniform array of Pt nanoparticles with a size of 10 nm. Cryogenic, time-resolved, and gate-tunable luminescence measurements combined with near-field luminescence spectroscopy suggest the formation of localized states in strained regions that emit single photons with a high spatial density. Our approach of using a metal nanoparticle array to generate a high density of strained quantum emitters opens a new path towards scalable, tunable, and versatile quantum light sources.

cond-mat.mes-hall↗

arXiv2022

Scalable CMOS-BEOL compatible AlScN/2D Channel FE-FETs

Intimate integration of memory devices with logic transistors is a frontier challenge in computer hardware. This integration is essential for augmenting computational power concurrently with enhanced energy efficiency in big-data applications such as artificial intelligence. Despite decades of efforts, reliable, compact, energy efficient and scalable memory devices are elusive. Ferroelectric Field Effect Transistors (FE-FETs) are a promising candidate but their scalability and performance in a back-end-of-line (BEOL) process remain unattained. Here, we present scalable BEOL compatible FE-FETs using two-dimensional (2D) MoS2 channel and AlScN ferroelectric dielectric. We have fabricated a large array of FE-FETs with memory windows larger than 7.8 V, ON/OFF ratios of greater than 10^7, and ON current density greater than 250 uA/um, all at ~80 nm channel lengths. Our devices show stable retention up to 20000 secs and endurance up to 20000 cycles in addition to 4-bit pulse programmable memory features thereby opening a path towards scalable 3D hetero-integration of 2D semiconductor memory with Si CMOS logic.

physics.app-ph↗

arXiv2021

High-Specific-Power Flexible Transition Metal Dichalcogenide Solar Cells

Semiconducting transition metal dichalcogenides (TMDs) are promising for flexible high-specific-power photovoltaics due to their ultrahigh optical absorption coefficients, desirable band gaps and self-passivated surfaces. However, challenges such as Fermi-level pinning at the metal contact-TMD interface and the inapplicability of traditional doping schemes have prevented most TMD solar cells from exceeding 2% power conversion efficiency (PCE). In addition, fabrication on flexible substrates tends to contaminate or damage TMD interfaces, further reducing performance. Here, we address these fundamental issues by employing: 1) transparent graphene contacts to mitigate Fermi-level pinning, 2) $\rm{MoO}_\it{x}$ capping for doping, passivation and anti-reflection, and 3) a clean, non-damaging direct transfer method to realize devices on lightweight flexible polyimide substrates. These lead to record PCE of 5.1% and record specific power of $\rm{4.4\ W\,g^{-1}}$ for flexible TMD ($\rm{WSe_2}$) solar cells, the latter on par with prevailing thin-film solar technologies cadmium telluride, copper indium gallium selenide, amorphous silicon and III-Vs. We further project that TMD solar cells could achieve specific power up to $\rm{46\ W\,g^{-1}}$, creating unprecedented opportunities in a broad range of industries from aerospace to wearable and implantable electronics.

physics.app-ph↗