Testing the EPYC Conjecture on Real Hardware: MoA-Guided Dense Matrix Multiplication on NCSA Delta (AMD EPYC 7763 Milan)
A companion empirical study conjectured that MoA-guided dense matrix multiplication would need per-CCD recalibration on AMD EPYC Bergamo; allocation access to that machine was declined, and this paper reports the resulting test on NCSA Delta, an architecturally related chip. Its central claim: every result here traces to shape, not architecture in the abstract -- cache shape, access-pattern shape, and co-tenancy itself treated as a shape parameter. The corrected block size M_C = 256 follows directly from Delta's real 512 KB L2 divided by the data type's own byte width, no parameter fit after the fact, and outperforms the M1-Pro-inherited M_C = 64 by 30--59% -- a block's shape finally matching the cache shape it was always meant to occupy. The same reasoning extends to a shared level: co-tenancy treated as raw capacity fails by an order of magnitude, while co-tenancy treated as a shape parameter -- capacity divided by concurrent consumers -- survives. A controlled NUMA experiment isolates a third shape: GEBP and MoA-pipelined compute the identical result at identical achieved bandwidth, yet GEBP loses 13.9% of its throughput to remote memory while MoA-pipelined loses only 2.4% -- not a speed difference, a difference in the shape each kernel's access pattern traces through memory. The headline result reproduces the M1 Pro's exact three-of-four win over a Strassen-GEBP hybrid, a pattern AWS Graviton4 did not achieve. One question is named rather than resolved: whether Delta's larger MoA-over-GEBP margin reflects genuine speed or an unmatched utilization fraction. Every result here was predicted before it was measured, not fitted after.