arXiv subjects

Leon Ruf

Publications and source records attributed to Leon Ruf.

6 recordsLinked to original sources

arXiv2025

Implantation studies of low-energy positive muons in niobium thin films

Here we study the range of keV positive muons $\mu^+$ implanted in Nb$_2$O$_5$($x$ nm)/Nb($y$ nm)/SiO$_2$(300 nm)/Si [$x$ = 3.6 nm, 3.3 nm; $y$ = 42.0 nm, 60.1 nm] thin films using low-energy muon spin spectroscopy (LE-$\mu$SR). At implantation energies 1.3 keV $\leq E \leq$ 23.3 keV, we compare the measured diamagnetic $\mu^+$ signal fraction $f_{\mathrm{dia.}}$ against predictions derived from implantation profile simulations using the TRIM.SP Monte Carlo code. Treating the implanted $\mu^+$ as light protons, we find that simulations making use of updated stopping cross section data are in good agreement with the LE-$\mu$SR measurements, in contrast to parameterizations found in earlier tabulations. Implications for other studies relying on accurate $\mu^+$ stopping information are discussed.

cond-mat.mtrl-sci↗

arXiv2025

Superconducting non-volatile memory based on charge trapping and gate-controlled supercurrent

Superconducting electronics holds great promise for energy-efficient high-performance and quantum computing, yet no superconducting memory has matched the performance of conventional semiconductor memories $-$ a long-standing bottleneck. Here we demonstrate a voltage-controlled, non-volatile superconducting memory that exploits two previously independent effects: gate-controlled supercurrent (GCS), the gate-voltage-induced suppression of the critical current $I_c$ in a superconducting constriction, and charge trapping in an Al$_2$O$_3$ dielectric. Trapped charges shift the threshold gate voltage required for $I_c$ suppression, defining two stable, well-separated $I_c$ states that can be used to store binary information. We demonstrate reliable non-destructive readout and reversible write/erase cycling over nearly fifty consecutive cycles with the device remaining in the zero-resistance state throughout. Stored information survives thermal cycling well above the superconducting transition temperature $T_c$, confirming true non-volatility $-$ a capability absent in all existing superconducting memories. We further discuss integration into a NAND architecture and show significant power-dissipation advantages over CMOS charge-trap flash memories.

cond-mat.supr-con↗

arXiv2024

High-performance gate-controlled superconducting switches: large output voltage and reproducibility

Logic circuits consist of devices that can be controlled between two distinct states. The recent demonstration that a superconducting current flowing in a constriction can be controlled via a gate voltage ($V_G$) - can lead to superconducting logic with better performance than existing logics. However, before such logic is developed, high reproducibility in the functioning of GCS devices and optimization of their performance must be achieved. Here, we report an investigation of gated Nb devices showing GCS with unprecedently-high reproducibility. Based on the investigation of a statistically-significant number of devices, we demonstrate that the GCS is independent of the constriction width, in contrast with previous reports, and confirm a strong correlation between the GCS and the leakage current ($I_{leak}$) induced by $V_G$. We also achieve a voltage output in our devices larger than the typical values reported to date by at least one order of magnitude, which is relevant for the future interconnection of devices, and show that $I_{leak}$ can be used as a tool to modulate the operational $V_G$ of devices on a $SiO_2$ substrates. These results altogether represent an important step forward towards the optimization of reproducibility and performance of GCS devices, and the future development of a GCS-based logic.

cond-mat.supr-con↗

arXiv2023

Gate-controlled supercurrent effect in dry-etched Dayem bridges of non-centrosymmetric niobium rhenium

The application of a gate voltage to control the superconducting current flowing through a nanoscale superconducting constriction, named as gate-controlled supercurrent (GCS), has raised great interest for fundamental and technological reasons. To gain a deeper understanding of this effect and develop superconducting technologies based on it, the material and physical parameters crucial for GCS must be identified. Top-down fabrication protocols should be also optimized to increase device scalability, although studies suggest that top-down fabricated devices are more resilient to show GCS. Here, we investigate gated superconducting nanobridges made with a top-down fabrication process from thin films of the non-centrosymmetric superconductor NbRe. Unlike other devices previously reported, our NbRe devices systematically exhibit GCS, when made in specific conditions, which paves the way for higher device scalability. Our results also suggest that surface properties of NbRe nanobridges and their modification during fabrication are key for GCS.

cond-mat.supr-con↗

arXiv2023

Effects of fabrication routes and material parameters on the control of superconducting currents by gate voltage

The control of a superconducting current via the application of a gate voltage has been recently demonstrated in a variety of superconducting devices. Although the mechanism underlying this gate-controlled supercurrent (GCS) effect remains under debate, the GCS effect has raised great interest for the development of the superconducting equivalent of conventional metaloxide semiconductor electronics. To date, however, the GCS effect has been mostly observed in superconducting devices made by additive patterning. Here, we show that devices made by subtractive patterning show a systematic absence of the GCS effect. Doing a microstructural analysis of these devices and comparing them to devices made by additive patterning, where we observe a GCS, we identify some material and physical parameters that are crucial for the observation of a GCS. We also show that some of the mechanisms proposed to explain the origin of the GCS effect are not universally relevant.

cond-mat.supr-con↗

arXiv2023

Gate control of superconducting current: Mechanisms, parameters and technological potential

In conventional metal-oxide semiconductor (CMOS) electronics, the logic state of a device is set by a gate voltage (VG). The superconducting equivalent of such effect had remained unknown until it was recently shown that a VG can tune the superconducting current (supercurrent) flowing through a nanoconstriction in a superconductor. This gate-controlled supercurrent (GCS) effect can lead to superconducting logics like CMOS logics, but with lower energy dissipation. The physical mechanism underlying the GCS effect, however, remains under debate. In this review article, we illustrate the main mechanisms proposed for the GCS effect, and the material and device parameters that mostly affect it based on the evidence reported. We will come to the conclusion that different mechanisms are at play in the different studies reported so far. We then outline studies that can help answer open questions on the effect and achieve control over it, which is key for applications. We finally give insights into the impact that the GCS effect can have towards high-performance computing with low-energy dissipation and quantum technologies.

cond-mat.supr-con↗