arXiv subjects

Liliang Ying

Publications and source records attributed to Liliang Ying.

4 recordsLinked to original sources

arXiv2026

A plug-and-play superconducting quantum controller at millikelvin temperatures enables exceeding 99.9% average gate fidelity

The development of large-scale superconducting quantum computing requires efficient in-situ control methods that allow high-fidelity operations at millikelvin temperatures. Superconducting circuits based on Josephson junctions offer a promising solution due to their high speed, low power dissipation, and cryogenic nature. Here, we report a superconducting quantum controller that enables direct chip-to-chip interconnection with qubits at 10 mK and high-fidelity, all-digital manipulation. Randomized benchmarking reveals a uniformly high average Clifford fidelity of 99.9% with leakage to high energy levels on the order of $10^{-4}$, and an estimated average gate operation energy of 0.121 fJ, demonstrating the potential to resolve the control bottleneck in superconducting quantum computing.

quant-ph↗

arXiv2023

Development of 15kA/cm$^2$ Fabrication Process for Superconducting Integrated Digital Circuits

A new fabrication process for superconducting integrated digital circuits is reported. We have developed the "SIMIT Nb04" fabrication technique for superconducting integrated circuits with Nb-based Josephson junctions based on the validated "SIMIT Nb03" process and Chemical Mechanical Planarization (CMP) technology. Seven Nb superconducting layers and one Mo resistor layer are included in the "SIMIT Nb04" process with 19 mask levels. The device structure is composed of active layers including junctions at the bottom, two passive transmission line (PTL) layers in the middle and a DC power layer at the top. The circuit fabrication started with the fabrication of Mo resistors with a target sheet resistance Rsh of 3 $Ω$, followed by the deposition of Nb/Al-AlO$_x$/Nb trilayer Josephson-junction with a target critical current density Jc at 15 kA/cm$^2$. To increase the Al-AlO$_x$ barrier layer etching's repeatability, an additional barrier protection layer was applied. To accomplish high-quality planarization, we created a planarization procedure coupled with dummy filling. To assess the process dependability and controllability, a set of process control monitors (PCMs) for monitoring fabrication and design parameters was designed and monitored. The successful manufacturing and testing of a few small-scale circuits, like our standard library cells, further attests to the viability of our fabrication process for superconducting integrated circuits.

physics.app-ph↗

arXiv2023

Quasiparticle Dynamics in Superconducting Quantum-Classical Hybrid Circuits

Single flux quantum (SFQ) circuitry is a promising candidate for a scalable and integratable cryogenic quantum control system. However, the operation of SFQ circuits introduces non-equilibrium quasiparticles (QPs), which are a significant source of qubit decoherence. In this study, we investigate QP behavior in a superconducting quantum-classical hybrid chip that comprises an SFQ circuit and a qubit circuit. By monitoring qubit relaxation time, we explore the dynamics of SFQ-circuit-induced QPs. Our findings reveal that the QP density near the qubit reaches its peak after several microseconds of SFQ circuit operation, which corresponds to the phonon-mediated propagation time of QPs in the hybrid circuits. This suggests that phonon-mediated propagation dominates the spreading of QPs in the hybrid circuits. Our results lay the foundation to suppress QP poisoning in quantum-classical hybrid systems.

quant-ph↗

arXiv2020

Development of Multi-Layer Fabrication Process for SFQ Large Scale Integrated Digital Circuits

We have developed a fabrication technology for the development of large-scale superconducting integrated circuits with Nb-based Josephson junctions. The standard fabrication process with 10 mask levels uses four metal layers including 3 Nb superconducting layers and a Mo resistor layer. The influence of deposition parameters on film stress, electrical properties, and surface roughness were studied systematically. High quality Nb, Al, Mo, and SiO2 films were successfully deposited for the subsequent fabrication of circuits. The circuit fabrication started with the fabrication of Mo resistors with a target sheet resistance Rsh of 2 Ome, followed by the deposition of Josephson-junction. The target critical current density Jc was set at 6 kA per cm2. The thicknesses and etch depths of the films were monitored during fabrication with on-wafer process-control-monitor (PCM) patterns for all the wafers.

cond-mat.supr-con↗