arXiv subjects

Lingjun Zhu

Publications and source records attributed to Lingjun Zhu.

7 recordsLinked to original sources

arXiv2026

Pythia: Exploiting Workflow Predictability for Efficient Agent-Native LLM Serving

As LLM applications grow more complex, developers are increasingly adopting multi-agent architectures to decompose workflows into specialized, collaborative components, introducing structure that constrains agent behavior and exposes useful semantic predictability. Unlike traditional LLM serving, which operates under highly dynamic and uncertain conditions, this structured topology enables opportunities to reduce runtime uncertainty$\unicode{x2015}$yet existing systems fail to exploit it, treating agentic workloads as generic traffic and incurring significant inefficiencies. Our analysis of production traces from an agent-serving platform and an internal coding assistant reveals key bottlenecks, including low prefix cache hit rates, severe resource contention from long-context requests, and substantial queuing delays due to suboptimal scaling. To address these challenges, we propose Pythia, a multi-agent serving system that captures workflow semantics through a simple interface at the serving layer, unlocking new optimization opportunities and substantially improving throughput and job completion time over state-of-the-art baselines.

cs.MA↗

arXiv2025

Real-Time Coupled Electron-Nuclear Dynamics of Chemical Bond Formation: Hydrogen Scattering from a Semiconductor Surface

A first-principles coupled electron-nuclear dynamics simulation based on real-time, time-dependent density functional theory and Ehrenfest dynamics quantitatively repro-duces bimodal translational energy loss and angular distributions observed in experiment for hydrogen atom scattering from Ge(111)-c(2*8). The theory elucidates a site-selective mechanism of electronically nonadiabatic energy transfer associated with the formation of different Ge-H bonds. When a hydrogen atom approaches a Ge rest-atom, it is strongly accelerated toward the potential minimum forming a transient Ge-H bond and then re-flected by the repulsive wall. This transient bond formation triggers an ultrafast electron transfer event from the rest-atom to an adjacent Ge-adatom, involving several crossings between valence and conduction bands of the substrate. Electronic equilibration is impos-sible within such a short time (Born-Oppenheimer failure) allowing the H-atom kinetic energy to be converted to inter-band electronic excitation of the substrate. H-atom colli-sions at other Ge atoms also form a transient bond but exhibit no electronic excitation, resulting in distinctly less efficient energy loss in scattered H-atoms. The nucle-ar-to-electronic energy transfer observed in this system reflects the electronic dynamics of covalent bond formation at a semiconductor surface, a mechanism that is quite distinct from previously identified nonadiabatic energy transfer mechanisms at metal surfaces mediated by electronic friction or transient negative ions.

physics.chem-ph↗

arXiv2025

FlexiNS: A SmartNIC-Centric, Line-Rate and Flexible Network Stack

As the gap between network and CPU speeds rapidly increases, the CPU-centric network stack proves inadequate due to excessive CPU and memory overhead. While hardware-offloaded network stacks alleviate these issues, they suffer from limited flexibility in both control and data planes. Offloading network stack to off-path SmartNIC seems promising to provide high flexibility; however, throughput remains constrained by inherent SmartNIC architectural limitations. To this end, we design FlexiNS, a SmartNIC-centric network stack with software transport programmability and line-rate packet processing capabilities. To grapple with the limitation of SmartNIC-induced challenges, FlexiNS introduces: (a) a header-only offloading TX path; (b) an unlimited-working-set in-cache processing RX path; (c) a high-performance DMA-only notification pipe; and (d) a programmable offloading engine. We prototype FlexiNS using Nvidia BlueField-3 SmartNIC and provide out-of-the-box RDMA IBV verbs compatibility to users. FlexiNS achieves 2.2$\times$ higher throughput than the microkernel-based baseline in block storage disaggregation and 1.3$\times$ higher throughput than the hardware-offloaded baseline in KVCache transfer.

cs.NI↗

arXiv2024

Mechanistic Insights into Non-Adiabatic Interband Transitions on a Semiconductor Surface Induced by Hydrogen Atom Collisions

To understand the recently observed mysterious non-adiabatic energy transfer for hyperthermal H atom scattering from a semiconductor surface, Ge(111)c(2*8), we present a mixed quantum-classical non-adiabatic molecular dynamics model based on time-dependent evolution of Kohn-Sham orbitals and a classical path approximation. Our results suggest that facile non-adiabatic transitions occur selectively at the rest atom site, featuring excitation of valance band electrons to the conduction band, but not at the adatom site. This drastic site specificity can be attributed to the changes of the local band structure upon energetic H collisions at different surface sites, leading to transient near-degeneracies and significant couplings between occupied and unoccupied orbitals at the rest atom, but not at the adatom. These insights shed valuable light on the collisional induced non-adiabatic dynamics at semiconductor surfaces.

physics.chem-ph↗

arXiv2024

Demystifying Datapath Accelerator Enhanced Off-path SmartNIC

Network speeds grow quickly in the modern cloud, so SmartNICs are introduced to offload network processing tasks, even application logic. However, typical multicore SmartNICs such as BlueFiled-2 are only capable of processing control-plane tasks with their embedded processors that have limited memory bandwidth and computing power. On the other hand, cloud applications evolve rapidly, such that a limited number of fixed hardware engines in a SmartNIC cannot satisfy the requirements of cloud applications. Therefore, SmartNIC programmers call for a programmable datapath accelerator (DPA) to process network traffic at line rate. However, no existing work has unveiled the performance characteristics of the existing DPA. To this end, we present the first architectural characterization of the latest DPA-enhanced BlueFiled-3 (BF3) SmartNIC. Our evaluation results indicate that BF3's DPA is significantly wimpier than the off-path Arm processor and the host CPU. However, we still identify that DPA has three unique architectural characteristics that unleash the performance potential of DPA. Specifically, we demonstrate how to take advantage of DPA's three architectural characteristics regarding computing, networking, and memory subsystems. Then we propose three important guidelines for programmers to fully unleash the potential of DPA. To demonstrate the effectiveness of our approach, we conduct detailed case studies regarding each guideline. Our case study on key-value aggregation achieves up to 4.3$\times$ higher throughput by using our guidelines to optimize memory combinations.

cs.NI↗

arXiv2021

Architecture, Dataflow and Physical Design Implications of 3D-ICs for DNN-Accelerators

The everlasting demand for higher computing power for deep neural networks (DNNs) drives the development of parallel computing architectures. 3D integration, in which chips are integrated and connected vertically, can further increase performance because it introduces another level of spatial parallelism. Therefore, we analyze dataflows, performance, area, power and temperature of such 3D-DNN-accelerators. Monolithic and TSV-based stacked 3D-ICs are compared against 2D-ICs. We identify workload properties and architectural parameters for efficient 3D-ICs and achieve up to 9.14x speedup of 3D vs. 2D. We discuss area-performance trade-offs. We demonstrate applicability as the 3D-IC draws similar power as 2D-ICs and is not thermal limited.

cs.AR↗

arXiv2020

Vortex: OpenCL Compatible RISC-V GPGPU

The current challenges in technology scaling are pushing the semiconductor industry towards hardware specialization, creating a proliferation of heterogeneous systems-on-chip, delivering orders of magnitude performance and power benefits compared to traditional general-purpose architectures. This transition is getting a significant boost with the advent of RISC-V with its unique modular and extensible ISA, allowing a wide range of low-cost processor designs for various target applications. In addition, OpenCL is currently the most widely adopted programming framework for heterogeneous platforms available on mainstream CPUs, GPUs, as well as FPGAs and custom DSP. In this work, we present Vortex, a RISC-V General-Purpose GPU that supports OpenCL. Vortex implements a SIMT architecture with a minimal ISA extension to RISC-V that enables the execution of OpenCL programs. We also extended OpenCL runtime framework to use the new ISA. We evaluate this design using 15nm technology. We also show the performance and energy numbers of running them with a subset of benchmarks from the Rodinia Benchmark suite.

cs.DC↗