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Luca Giangrande

Publications and source records attributed to Luca Giangrande.

5 recordsLinked to original sources

High-speed single-photoelectron detection for Cherenkov astronomy

Silicon photomultipliers are increasingly replacing photomultiplier tubes in Cherenkov telescope cameras, but achieving single-photoelectron resolution with nanosecond timing in a low-noise, scalable detector system remains challenging. We present a co-designed SiPM sensor and front-end application specific integrated circuit (ASIC) that meets these requirements. The custom hexagonal sensor, developed with Hamamatsu Photonics, incorporates an integrated optical filter and fourfold pixel segmentation. The readout is performed by a second prototype of the FANSIC ASIC, optimized for this application and fabricated in 65~nm standard CMOS technology, it provides eight channels with on-chip analog summing of sub-channels on a $3.5\times 3.5~\mathrm{mm}^2$ die, while consuming only 24~mW per channel. We demonstrate clear single-photoelectron peak separation with a gain of $2.7 \times 10^{-12}~ \mathrm{V \cdot s}$ , and an impulse response below 4~ns full width at half maximum with a 1.7 ns rise time, preserving the nanosecond-scale structure of Cherenkov pulses. The system responds linearly from 1 to 130 photoelectrons, and 55 distinct photoelectron peaks are resolved by varying the source intensity. These results demonstrate that the integrated sensor-electronics architecture delivers the speed, resolution, and dynamic range required for imaging atmospheric Cherenkov telescopes, and provides a scalable path toward large-area camera modules.

astro-ph.IM

A 200 dB Dynamic Range Radiation-Hard Delta-Sigma Current Digitizer for Beam Loss Monitoring

This manuscript describes a radiation-hardened current-mode delta-sigma ADC fabricated in a standard 130 nm CMOS technology and qualified for total ionizing doses up to 100 Mrad. The operational signal range achieved with a 100 s integration window exceeds 200 dB. The converter is designed for beam loss monitoring applications in high-energy physics, where it must handle input currents spanning nine decades, from 1 mA down to 1 pA, while providing a fast 10 us response time for machine protection. To meet these conflicting requirements, the architecture exploits the inherent trade-off between resolution and acquisition time provided by delta-sigma conversion: a first-order architecture, sampling at 20 MHz, delivers 11-bit effective resolution within the critical 10 us window for critical currents around 1 mA. Integration times above 10 s enable the sub-picoampere resolution required for precise beam alignment and background monitoring. The chip integrates two independent channels, consumes 25 mW from a 1.2 V supply, and relies on radiation-hardening techniques such as triple-redundant digital logic, custom ESD protections, and manual enclosed layout for critical analog transistors. Post-irradiation measurements up to 100 Mrad show no significant performance degradation, and the uncalibrated integral nonlinearity remains within [+4, -5] LSBs over the 1 mA to 5 uA range. The converter's flexibility and radiation tolerance make it suitable not only for the HL-LHC beam loss monitoring upgrade but also for other precision current measurement applications in harsh environments.

physics.ins-det

Continuous and Discrete-Time Filters: A Unified Operational Perspective

Continuous time (CT) and discrete time (DT) linear time invariant (LTI) systems are commonly introduced through distinct mathematical formalisms, which can obscure their underlying dynamical equivalence. This tutorial presents a unified treatment of firstorder CT and DT systems, emphasizing their shared modal structure and stability properties. Beginning with transfer functions and pole zero representations in the Laplace domain, canonical first order low pass and high-pass dynamics are examined from an operational perspective. The discussion then transitions to discrete-time sequences and the Z transform, highlighting geometric sequences as eigenfunctions of DT systems and establishing the correspondence between the left half of the s plane and the interior of the unit circle in the z plane. Practical discretization and sampled data implementations are analyzed to illustrate how continuous time dynamics are reinterpreted through recursion and accumulation in discrete time realizations. By maintaining structural symmetry between domains, the manuscript consolidates established concepts into a coherent framework linking mathematical representation, physical realizability, and implementation.

eess.SP

Lambda/6 Suspended Patch Antenna

This work introduces a novel, compact antenna design based on a lambda-6th suspended patch configuration that is particularly suited for small-size wireless sensor nodes. The proposed design meets key requirements such as compactness, omnidirectionality, robust source matching over a designated bandwidth, interference immunity, and low costs by evolving the conventional square patch antenna. With a footprint of only 20-by-20 mm, the antenna incorporates a grounded metal shield to both reduce its effective dimensions below one-half wavelength and mitigate interference from nearby circuitry. Simulation results, conducted on a cost-effective FR4 substrate, demonstrate a resonance at 2.45 GHz with a return loss of -32.5 dB and a bandwidth of 50 MHz (at the -10 dB level), making this design an attractive candidate for integration into densely populated wireless sensor networks.

eess.SY

FANSIC: a Fast ANalog SiPM Integrated Circuit for the readout of large silicon photomultipliers

Silicon photo-multipliers (SiPM) have been replacing traditional photomultiplier tubes in most light sensing applications. However, when large detection surface coverage is needed, photomultipliers (PMTs) are still the preferred choice. The main reasons are the sensor thermal noise and the duration of the fast component of its signal, both increasing with the sensor surface. In this work we propose an application specific integrated circuit (ASIC), called Fast ANalog SiPM Integrated Circuit (FANSIC), for the readout of large SiPMs addressing these limitations. The ASIC has an active summation stage, which allows to divide a large detection surface into smaller ones offering faster response both in single ended and differential outputs. The high input bandwidth allows to reach full-width-half-maximum (FWHM) signals or the order of 3--5 ns which limits the impact of internal and external uncorrelated noise. The results of the first implementation of FANSIC, designed in CMOS 65 nm technology, is described in this paper.

physics.ins-det