arXiv subjects

Lukas Chrostowski

Publications and source records attributed to Lukas Chrostowski.

At least 19 recordsLinked to original sources

arXiv2026

DC-to-GHz Modulation In Microring Modulators Using Ferroelectric Nematic Liquid Crystal-on-Silicon in a Foundry Photonic Process

Silicon-organic hybrid (SOH) platforms exhibit exceptional electro-optic (EO) properties, including high-speed operation, low energy consumption, and compact footprints. However, the absence of a scalable poling method for EO polymers, combined with the slow switching speeds characteristic of liquid crystals, has impeded the integration and compatibility of these materials with commercial silicon photonic foundries. On the other hand, the realization of very-large-scale photonic integrated circuits (PICs) in the native silicon photonics platform itself is impeded by the complexities associated with the wavelength and thermal stabilization for microring modulators (MRMs). This study establishes the foundation for a poling-free, CMOS-compatible SOH MRM platform by exploiting simultaneous AC phase shifts in ferroelectric nematic liquid crystals (FN-LCs). We present the first demonstration of an MRM coated with FN-LC, with both the RF signal and the DC bias applied to the same electrodes, taking advantage of the dual phase shift uniquely available in FN-LC. An EO bandwidth of f$_{-6dB}\approx$ 7.8 GHz is achieved \textendash~ the highest reported value for an SOH MRM to date. As a proof of concept, we demonstrate an approximately linear resonance shift across the full width at half maximum ($\approx$ 150 pm/V), with a static power efficiency of $\approx$ 4.5 nW/$\pi$ for an MRM occupying a total footprint of $\approx$ 0.084 mm$^2$ and exhibiting an on-chip optical insertion loss of $\approx$ 0.78 dB. Successful infiltration of FN-LC, selectively patterned on top of phase shifters, along with optical input/output channels established using free-form photonic wire bonds, is demonstrated in the proposed PIC.

physics.optics↗

arXiv2026

Neuromorphic Photonic Computing with an Electro-Optic Analog Memory

In neuromorphic photonic systems, device operations are typically governed by analog signals, necessitating digital-to-analog converters (DAC) and analog-to-digital converters (ADC). However, data movement between memory and these converters in conventional von Neumann architectures incur significant energy costs. We propose an analog electronic memory co-located with photonic computing units to eliminate repeated long-distance data movement. Here, we demonstrate a monolithically integrated neuromorphic photonic circuit with on-chip capacitive analog memory and evaluate its performance in machine learning for in situ training and inference using the MNIST dataset. Our analysis shows that integrating analog memory into a neuromorphic photonic architecture can achieve over 26x power savings compared to conventional SRAM-DAC architectures. Furthermore, maintaining a minimum analog memory retention-to-network-latency ratio of 100 maintains >90% inference accuracy, enabling leaky analog memories without substantial performance degradation. This approach reduces reliance on DACs, minimizes data movement, and offers a scalable pathway toward energy-efficient, high-speed neuromorphic photonic computing.

cs.ET↗

arXiv2025

Optoelectronic Physical Unclonable Functions and Reservoir-Inspired Computation with Low Symmetry Integrated Photonics

Emerging applications of photonics in computing, sensing, and security increasingly demand complex input-output behaviors, including highly nonlinear transformations of optical signals. Traditional photonic systems rely on highly structured components with symmetric geometries and low-entropy modal responses to achieve predictable and analytically describable behavior. To achieve expressive functionality, this paradigm often requires large networks of fabrication-sensitive interferometers or resonators and substantial hardware error correction to restore deterministic operation. Here we demonstrate an alternative paradigm rooted in low-symmetry, disordered integrated photonic circuits, which provide intrinsically enhanced modal diversity and spectral complexity, enabling highly nonlinear transformations of input signals into information-rich outputs. Our devices, physically unclonable moire quasicrystal interferometers integrated on a silicon photonics platform, exhibit aperiodic and reconfigurable spectral responses and are characterized by analyticity breaking and erasable mutual information. Using dynamic thermo-optic control to drive their complex spectral dynamics, we demonstrate that these devices function as reconfigurable physical unclonable functions (rPUFs). We also highlight their ability to perform high-dimensional input-output transformations, emulating reservoir-inspired information processing in a compact photonic platform. This work bridges the gap between engineered and natural complexity in photonic systems, revealing new opportunities for scalable, energy-efficient, and information-dense optoelectronics with applications in secure communications, hardware security, advanced sensing, and optical information processing. Our results establish low-symmetry integrated photonics as a powerful resource for complex signal manipulation in photonic systems.

physics.optics↗

arXiv2025

Impact of Oxygen Plasma Surface Treatment on Photoresist Adhesion in BaTiO3-Based Photonic Device Fabrication

Oxygen-plasma pre-cleans are routine before fabrication, but on BaTiO3 thin films we observed catastrophic photoresist lift-off during mild rinsing and sonication. To explain the failure, we combined optical microscopy, EDS, and XPS. EDS showed no meaningful bulk stoichiometry change, whereas XPS revealed a nanometer-scale, plasma-induced shift in surface chemistry: hydroxylation and carbonate formation consistent with a BaCO3-rich interphase at the resist/BaTiO3 boundary. This chemically weak interphase, recreated upon each plasma step and removable by simple solvent cleaning, provides the mechanism for delamination. The key takeaway for practitioners is process guidance: avoid uncritical O2-plasma use on BTO; if cleaning is required, use alternative chemistries (e.g., UV-ozone) or carefully tuned plasma windows that preserve adhesion. More broadly, the study illustrates how lightweight analytics at the surface (correlative microscopy + surface spectroscopy) can pinpoint the root cause of yield-limiting defects in oxide photonics and translate directly into higher-reliability process recipes.

cond-mat.mtrl-sci↗

arXiv2025

Isolator-Free Laser Operation Enabled by Chip-Scale Reflections in Zero-Process-Change SOI

The isolation-free operation of photonic integrated circuits enables dense integration, reducing packaging costs and complexity. Most isolator replacements require a change in the silicon-on-insulator (SOI) foundry process and suffer from large insertion loss. Most solutions did not integrate the laser, leaving the verification incomplete, and measurements with modulated reflections have also been missing. In this work, we present, for the first time, a zero-process-change silicon photonic (SiP) circuit that, when paired with an integrated distributed-feedback laser (DFB), enhances the DFB's immunity to continuous-wave and modulated parasitic reflections from multiple reflectors. The circuit generates intentional, controlled self-injection to stabilize laser dynamics and maintain operation. The SiP circuit is complemented by an electro-optic feedback loop that dynamically adjusts the self-injection to preserve laser stability. The proposed circuit introduces an insertion loss of 1.5 dB and enables the DFB laser to tolerate back reflections as large as -7 dB and -12 dB from on-chip and off-chip reflectors, respectively. The DFB is hybrid integrated with the SiP chip using a photonic wire bond (PWB). The isolator-free operation of the integrated laser in a high-speed optical link has been demonstrated, highlighting its potential for data communication applications.

physics.optics↗

arXiv2025

GHz-rate optical phase shift in light matter interaction-engineered, silicon-ferroelectric nematic liquid crystals

Organic electro-optic materials have demonstrated promising performance in developing electro-optic phase shifters. Their integration with other silicon photonic processes, nanofabrication complexities, and durability remains to be developed. While the required poling step in electro-optic polymers limits their potential and utilization on a large scale, devices made of paraelectric nematic liquid crystals suffer from slow bandwidth. In ferroelectric nematic liquid crystals, we report an additional GHz-fast phase shift that ultimately allows for significant second-order nonlinear optical coefficients related to the Pockels effect. It avoids poling issues and can pave the way for hybrid silicon-organic systems with CMOS-foundry compatibility. We report DC and AC modulation efficiencies of $\approx$~0.25 V$\cdot$mm (from liquid crystal orientation) and $\approx$~25.7 V$\cdot$mm (from Pockels effect), respectively, an on-chip insertion loss of $\approx$~2.6 dB, and an electro-optic bandwidth of $f_\text{-6dB}$>4.18 GHz, employing improved light-matter interaction in a waveguide architecture that calls for only one lithography step.

physics.optics↗

arXiv2025

Roadmap on Neuromorphic Photonics

This roadmap consolidates recent advances while exploring emerging applications, reflecting the remarkable diversity of hardware platforms, neuromorphic concepts, and implementation philosophies reported in the field. It emphasizes the critical role of cross-disciplinary collaboration in this rapidly evolving field.

cs.ET↗

arXiv2024

Physics to System-level Modeling of Silicon-organic-hybrid Nanophotonic Devices

The continuous growth in data volume has sparked interest in silicon-organic-hybrid nanophotonic devices integrated into silicon photonic integrated circuits (PICs). SOH devices offer improved speed and energy efficiency compared to silicon photonics devices. However, a comprehensive and accurate modeling methodology of SOH devices is lacking. While some preliminary modeling approaches for SOH devices exist, their reliance on theoretical and numerical methodologies, along with a lack of compatibility with electronic design automation (EDA), hinders their seamless and rapid integration with silicon PICs. Here, we develop a phenomenological, building-block-based SOH PICs simulation methodology spanning from the physics to the system level, offering high accuracy, comprehensiveness, and EDA-style compatibility. Our model is also readily integrable and scalable, lending itself to the design of large-scale silicon PICs. Our proposed modeling methodology is agnostic and compatible with any photonics-electronics co-simulation software. We validate this methodology by comparing experimentally demonstrated SOH microring modulators and Mach Zehnder modulators with those obtained through simulation, demonstrating its ability to model various modulator topologies. We also show our methodology's ease and speed in modeling large-scale systems. As an illustrative example, we use our methodology to design and study a 3-channel SOH MRM-based wavelength-division (de)multiplexer, a widely used component in various applications, including neuromorphic computing, data center interconnects, communications, and sensing. Our modeling approach is compatible with other materials exhibiting the Pockels and Kerr effects. To our knowledge, this represents the first comprehensive physics-to-system-level EDA-compatible simulation methodology for SOH modulators.

physics.optics↗

arXiv2024

An integrated evanescent-field biosensor in silicon

Decentralized diagnostic testing that is accurate, portable, quantitative, and capable of making multiple simultaneous measurements of different biomarkers at the point-of-need remains an important unmet need in the post-pandemic world. Resonator-based biosensors using silicon photonic integrated circuits are a promising technology to meet this need, as they can leverage (1) semiconductor manufacturing economies of scale, (2) exquisite optical sensitivity, and (3) the ability to integrate tens to hundreds of sensors on a millimeter-scale photonic chip. However, their application to decentralized testing has historically been limited by the expensive, bulky tunable lasers and alignment optics required for their readout. In this work, we introduce a segmented sensor architecture that addresses this important challenge by facilitating resonance-tracking readout using a fixed-wavelength laser. The architecture incorporates an in-resonator phase shifter modulated by CMOS drivers to periodically sweep and acquire the resonance peak shifts as well as a distinct high-sensitivity sensing region, maintaining high performance at a fraction of the cost and size. We show, for the first time, that fixed-wavelength sensor readout can offer similar performance to traditional tunable laser readout, demonstrating a system limit of detection of 6.1 x 10-5 RIU as well as immunoassay-based detection of the SARS-CoV-2 spike protein. We anticipate that this sensor architecture will open the door to a new data-rich class of portable, accurate, multiplexed diagnostics for decentralized testing.

physics.ins-det↗

arXiv2024

Fabrication-Aware Inverse Design For Shape Optimization

Inverse design (ID) is a computational method that systematically explores a design space to find optimal device geometries based on specific performance criteria. In silicon photonics, ID often leads to devices with design features that degrade significantly due to the fabrication process, limiting the applicability of these devices in scalable silicon photonic fabrication. We demonstrate a solution to this performance degradation through fabrication-aware inverse design (FAID), integrating lithography models for deep-ultraviolet (DUV) lithography and electron beam lithography (EBL) into the shape optimization approach of ID. A Y-branch and an SWG-to-strip converter were generated and fabricated with this new approach. Simulated and measured results verify that the FAID yields devices with up to 0.6 dB lower insertion loss per device. The modified workflow enables designers to use ID to generate devices that adjust for process bias predicted by lithography models.

eess.SY↗

arXiv2024

120 GOPS Photonic Tensor Core in Thin-film Lithium Niobate for Inference and in-situ Training

Photonics offers a transformative approach to artificial intelligence (AI) and neuromorphic computing by enabling low-latency, high-speed, and energy-efficient computations. However, conventional photonic tensor cores face significant challenges in constructing large-scale photonic neuromorphic networks. Here, we propose a fully integrated photonic tensor core, consisting of only two thin-film lithium niobate (TFLN) modulators, a III-V laser, and a charge-integration photoreceiver. Despite its simple architecture, it is capable of implementing an entire layer of a neural network with a computational speed of 120 GOPS, while also allowing flexible adjustment of the number of inputs (fan-in) and outputs (fan-out). Our tensor core supports rapid in-situ training with a weight update speed of 60 GHz. Furthermore, it successfully classifies (supervised learning) and clusters (unsupervised learning) 112 * 112-pixel images through in-situ training. To enable in-situ training for clustering AI tasks, we offer a solution for performing multiplications between two negative numbers.

physics.optics↗

arXiv2024

Mid-infrared characterization of NbTiN superconducting nanowire single-photon detectors on silicon-on-insulator

Superconducting nanowire single-photon detectors are widely used for detecting individual photons across various wavelengths from ultraviolet to near-infrared range. Recently, there has been increasing interest in enhancing their sensitivity to single photons in the mid-infrared spectrum, driven by applications in quantum communication, spectroscopy and astrophysics. Here, we present our efforts to expand the spectral detection capabilities of U-shaped NbTiN-based superconducting nanowire single-photon detectors, fabricated in a 2-wire configuration on a silicon-on-insulator substrate, into the mid-infrared range. We demonstrate saturated internal detection efficiency extending up to a wavelength of 3.5 μm for a 5 nm thick and 50 nm wide NbTiN nanowire with a dark count rate less than 10 counts per second at 0.9 K and a rapid recovery time of 4.3 ns. The detectors are engineered for integration on waveguides in a silicon-on-insulator platform for compact, multi-channel device applications.

quant-ph↗

arXiv2024

Enabling data-driven and bidirectional model development in Verilog-A for photonic devices

We present a method to model photonic components in Verilog-A by introducing bidirectional signaling through a single port. To achieve this, the concept of power waves and scattering parameters from electromagnetism are employed. As a consequence, one can simultaneously transmit forward and backward propagating waves on a single wire while also capturing realistic, measurement-backed response of photonic components in Verilog-A. We demonstrate examples to show the efficacy of the proposed technique in accounting for critical effects in photonic integrated circuits such as Fabry-Perot cavity resonance, reflections to lasers, etc. Our solution makes electronic-photonic co-simulation more intuitive and accurate.

cs.ET↗

arXiv2024

Roadmapping the Next Generation of Silicon Photonics

Silicon photonics has developed into a mainstream technology driven by advances in optical communications. The current generation has led to a proliferation of integrated photonic devices from thousands to millions - mainly in the form of communication transceivers for data centers. Products in many exciting applications, such as sensing and computing, are around the corner. What will it take to increase the proliferation of silicon photonics from millions to billions of units shipped? What will the next generation of silicon photonics look like? What are the common threads in the integration and fabrication bottlenecks that silicon photonic applications face, and which emerging technologies can solve them? This perspective article is an attempt to answer such questions. We chart the generational trends in silicon photonics technology, drawing parallels from the generational definitions of CMOS technology. We identify the crucial challenges that must be solved to make giant strides in CMOS-foundry-compatible devices, circuits, integration, and packaging. We identify challenges critical to the next generation of systems and applications - in communication, signal processing, and sensing. By identifying and summarizing such challenges and opportunities, we aim to stimulate further research on devices, circuits, and systems for the silicon photonics ecosystem.

physics.optics↗

arXiv2024

Reinforcement Learning for Photonic Component Design

We present a new fab-in-the-loop reinforcement learning algorithm for the design of nano-photonic components that accounts for the imperfections present in nanofabrication processes. As a demonstration of the potential of this technique, we apply it to the design of photonic crystal grating couplers fabricated on an air clad 220 nm silicon on insulator single etch platform. This fab-in-the-loop algorithm improves the insertion loss from 8.8 to 3.24 dB. The widest bandwidth designs produced using our fab-in-the-loop algorithm can cover a 150 nm bandwidth with less than 10.2 dB of loss at their lowest point.

physics.optics↗

arXiv2024

Packaged Cryogenic Photon Pair Source Using an Effective Packaging Methodology for Cryogenic Integrated Optics

A new cryogenic packaging methodology that is widely applicable to packaging any integrated photonics circuit for operation at both room temperature and cryogenic temperature is reported. The method requires only equipment and techniques available in any integrated optics lab and works on standard integrated photonic chips. Our methodology is then used to enable the measurement of a single photon pair sourced based on a silicon ring resonator at cryogenic temperatures. When operating at 5.9 K, this source is measured to have a peak pair generation rate 183 times greater then at room temperature in the CL-band.

physics.optics↗

arXiv2023

Cryogenic Optical Packaging Using Photonic Wire Bonds

We present the required techniques for the successful low loss packaging of integrated photonic devices capable of operating down to 970 mK utilizing photonic wire bonds. This scalable technique is shown to have an insertion loss of less than 2 dB per connection between a SMF-28 single mode fibre and a silicon photonic chip at these temperatures. This technique has shown robustness to thermal cycling and is ultra-high vacuum compatible without the need for any active alignment.

physics.optics↗

arXiv2022

Monolithically integrated 940 nm half VCSELs on bulk Ge substrates

High quality n-type AlGaAs distributed Bragg reflectors (DBRs) and lnGaAs multiple quantum wells were successfully monolithically grown on 4-inch off-cut Ge (100) wafers. The grown structures have photoluminescence spectra and reflectance spectra comparable to those grown on conventional bulk GaAs wafers and have smooth morphology and reasonable uniformity. These results strongly support full VCSEL growth and fabrication on larger-area bulk Ge substrates for the mass production of AlGaAs-based VCSELs.

cond-mat.mtrl-sci↗