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Luyi Li

Publications and source records attributed to Luyi Li.

8 recordsLinked to original sources

Z-1: Efficient Reinforcement Learning for Vision-Language-Action Models

Vision-Language-Action (VLA) models offer a promising framework for robotic manipulation by connecting language instructions, visual observations, and continuous control. However, most existing policies remain limited by behavior cloning or supervised fine-tuning (SFT) from fixed demonstrations, which provides limited opportunity to improve from the policy's own failures. In this paper, we present Z-1, a reinforcement learning (RL) post-training framework for flow-based VLA models. Built on top of $\pi_{0.5}$, Z-1 uses only publicly released RoboCasa demonstrations for SFT and then applies a task-wise Group Relative Policy Optimization (GRPO) strategy across $24$ standard RoboCasa tasks. To improve the efficiency and stability of online optimization, Z-1 combines shared-prefix rollout construction, tree-structured trajectory branching, completion-aware reward calibration, and selective joint training of VLM and Action Expert. Across all $24$ RoboCasa tasks, Z-1 achieves an average success rate of $80.6\%$, improving over its SFT initialization by $13.2\%$ points and outperforms the published sota models. These results show that systematic GRPO post-training can substantially improve flow-based VLA policies without additional private demonstrations.

cs.RO

Pancyclicity in Graph Families with the Ore-Type Condition

Let $ n \in \mathbb{N} $ with $ n \geq 3 $, and let $\mathcal{G} = \{G_i:i\in [n]\} $ be a family of $ n $-vertex graphs on a common vertex set $V$, where the graphs in the family do not need to be distinct. A graph $H$ with vertex set $V$ is \emph{rainbow} in $\mathcal{G}$ if there exists an injection $ \phi: E(H) \to [n] $ such that $e \in E(G_{\phi(e)})$ for every edge $e \in E(H)$, where $|E(H)|\leq n$. In 2020, Joos and Kim proved that $\mathcal{G}$ contains a rainbow Hamiltonian cycle under the Dirac-type condition. Recently, Liu, Chen, and Ma generalized this result by replacing the Dirac-type condition with a more general Ore-type condition involving degree sums of non-adjacent vertices: If $\sigma(\mathcal{G}) \geq n$, then $\mathcal{G}$ contains a rainbow Hamiltonian cycle, where the Ore-type condition $\sigma(\mathcal{G})$ is defined as follows: $ \sigma(\mathcal{G}) = \min\{d_p(u) + d_q(v) \mid uv \notin E(G_i) \text{ for some } i \in [n] \text{ and for all } p, q \in [n]\}. $ In this paper, under the Ore-type condition, we show that either each vertex of $V$ is contained in a rainbow cycle of length $\ell$ for every $\ell\in[4,n]$, or $G_1=\cdots=G_n=K_{\frac{n}{2},\frac{n}{2}}$. As a corollary, we deduce the rainbow pancyclicity of $\mathcal{G}$, which supports the famous meta-conjecture posed by Bondy. Furthermore, we prove rainbow vertex-pancyclicity of $\mathcal{G}$ under the Ore-type condition and provide an extremal graph family to show that the result is sharp.

math.CO

Tur\'{a}n-Theoretic Bounds on Several Elementary Trapping Sets in LDPC Codes

LDPC codes have attracted significant attention due to their capacity-approaching performance. Elementary trapping sets are the main cause of the error floor phenomenon in LDPC codes. We investigate several graph structures associated with trapping sets, including theta graphs, dumbbell graphs, and short cycles with chords. Based on the Tur\'{a}n numbers of $\theta(2,2,2)$, $\theta(1,3,3)$ and $D(4,4;0)$, we prove that any $(a,b)$-ETS in a variable-regular Tanner graph with girth $g=8$ and variable degree $\gamma$ satisfies the inequality $b\geq a\gamma-\frac{a(\sqrt{24a-23}-1)}{4}$, provided that any two 8-cycles in the Tanner graph do not share common variable node. In addition, we can also eliminate ETSs by removing certain short-cycle structures with chords. The lower bounds on the minimum size of ETSs through these methods are improved. To assess practical impact, we analyze spectral radii of the ETSs and construct QC-LDPC codes to show frame error rates in the error floor region.

cs.IT

Planar Tur\'an number of disjoint union of $C_3$ and $C_5$

The planar Tur\'an number of $H$, denoted by $ex_{\mathcal{P}}(n,H)$, is the maximum number of edges in an $n$-vertex $H$-free planar graph. The planar Tur\'an number of $k\geq 3$ vertex-disjoint union of cycles is the trivial value $3n-6$. Let $C_{\ell}$ denote the cycle of length $\ell$ and $C_{\ell}\cup C_t$ denote the union of disjoint cycles $C_{\ell}$ and $C_t$. The planar Tur\'an number $ex_{\mathcal{P}}(n,H)$ is known if $H=C_{\ell}\cup C_k$, where $\ell,k\in \{3,4\}$. In this paper, we determine the value $ex_{\mathcal{P}}(n,C_3\cup C_5)=\lfloor\frac{8n-13}{3}\rfloor$ and characterize the extremal graphs when $n$ is sufficiently large.

math.CO

The Hitchhiker's Guide to Programming and Optimizing Cache Coherent Heterogeneous Systems: CXL, NVLink-C2C, and AMD Infinity Fabric

We present a thorough analysis of the use of modern heterogeneous systems interconnected by various cachecoherent links, including CXL, NVLink-C2C, and Infinity Fabric. We studied a wide range of server systems that combined CPUs from different vendors and various types of coherent memory devices, including CXL memory expander, CXL pool, CXL shared memory, GH200 GPU, and AMD MI300a HBM. For this study, we developed a heterogeneous memory benchmark suite, Heimdall, to profile the performance of such heterogeneous systems and present a detailed performance comparison across systems. By leveraging H E I M DA L L , we unveiled the detailed architecture design in these systems, drew observations on optimizing performance for workloads, and pointed out directions for future development of cache coherent heterogeneous systems.

cs.PF

Conflict-free chromatic index of trees

A graph $G$ is conflict-free $k$-edge-colorable if there exists an assignment of $k$ colors to $E(G)$ such that for every edge $e\in E(G)$, there is a color that is assigned to exactly one edge among the closed neighborhood of $e$. The smallest $k$ such that $G$ is conflict-free $k$-edge-colorable is called the conflict-free chromatic index of $G$, denoted $\chi'_{CF}(G)$. D\c{e}bski and Przyby\a{l}o showed that $2\le\chi'_{CF}(T)\le 3$ for every tree $T$ of size at least two. In this paper, we present an algorithm to determine the conflict-free chromatic index of a tree without 2-degree vertices, in time $O(|V(T)|)$. This partially answer a question raised by Kamyczura, Meszka and Przyby\a{l}o.

cs.DM

Transversals in a collections of trees

Let $\mathcal{S}$ be a fixed family of graphs on vertex set $V$ and $\mathcal{G}$ be a collection of elements in $\mathcal{S}$. We investigated the transversal problem of finding the maximum value of $|\mathcal{G}|$ when $\mathcal{G}$ contains no rainbow elements in $\mathcal{S}$. Specifically, we determine the exact values when $\mathcal{S}$ is a family of stars or a family of trees of the same order $n$ with $n$ dividing $|V|$. Further, all the extremal cases for $\mathcal{G}$ are characterized.

math.CO

PREFENDER: A Prefetching Defender against Cache Side Channel Attacks as A Pretender

Cache side channel attacks are increasingly alarming in modern processors due to the recent emergence of Spectre and Meltdown attacks. A typical attack performs intentional cache access and manipulates cache states to leak secrets by observing the victim's cache access patterns. Different countermeasures have been proposed to defend against both general and transient execution based attacks. Despite their effectiveness, they mostly trade some level of performance for security, or have restricted security scope. In this paper, we seek an approach to enforcing security while maintaining performance. We leverage the insight that attackers need to access cache in order to manipulate and observe cache state changes for information leakage. Specifically, we propose Prefender, a secure prefetcher that learns and predicts attack-related accesses for prefetching the cachelines to simultaneously help security and performance. Our results show that Prefender is effective against several cache side channel attacks while maintaining or even improving performance for SPEC CPU 2006 and 2017 benchmarks.

cs.AR