arXiv subjects

M. J. Morello

Publications and source records attributed to M. J. Morello.

10 recordsLinked to original sources

arXiv2023

A FPGA-based architecture for real-time cluster finding in the LHCb silicon pixel detector

This article describes a custom VHDL firmware implementation of a two-dimensional cluster-finder architecture for reconstructing hit positions in the new vertex pixel detector (VELO) that is part of the LHCb Upgrade. This firmware has been deployed to the existing FPGA cards that perform the readout of the VELO, as a further enhancement of the DAQ system, and will run in real time during physics data taking, reconstructing VELO hits coordinates on-the-fly at the LHC collision rate. This pre-processing allows the first level of the software trigger to accept a 11% higher rate of events, as the ready-made hits coordinates accelerate the track reconstruction and consumes significantly less electrical power. It additionally allows the raw pixel data to be dropped at the readout level, thus saving approximately 14% of the DAQ bandwidth. Detailed simulation studies have shown that the use of this real-time cluster finding does not introduce any appreciable degradation in the tracking performance in comparison to a full-fledged software implementation. This work is part of a wider effort aimed at boosting the real-time processing capability of HEP experiments by delegating intensive tasks to dedicated computing accelerators deployed at the earliest stages of the data acquisition chain.

physics.ins-det↗

arXiv2022

FPGA-based real-time data processing for accelerating reconstruction at LHCb

In Run-3, beginning in 2022, the LHCb software trigger will start reconstructing events at the LHC average crossing rate of 30 MHz. Within the upgraded DAQ system, LHCb established a testbed for new heterogeneous computing solutions for real-time event reconstruction, in view of future runs at even higher luminosities. One such solution is a highly-parallelized custom tracking processor ("Artificial Retina"), implemented in state of the art FPGA devices connected by fast serial links. We describe the status of a realistic prototype for the reconstruction of pixel tracking detectors that will run on real data during Run-3.

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arXiv2022

A Comparison of CPU and GPU implementations for the LHCb Experiment Run 3 Trigger

The LHCb experiment at CERN is undergoing an upgrade in preparation for the Run 3 data taking period of the LHC. As part of this upgrade the trigger is moving to a fully software implementation operating at the LHC bunch crossing rate. We present an evaluation of a CPU-based and a GPU-based implementation of the first stage of the High Level Trigger. After a detailed comparison both options are found to be viable. This document summarizes the performance and implementation details of these options, the outcome of which has led to the choice of the GPU-based implementation as the baseline.

physics.ins-det↗

arXiv2019

Design and performance of the LHCb trigger and full real-time reconstruction in Run 2 of the LHC

The LHCb collaboration has redesigned its trigger to enable the full offline detector reconstruction to be performed in real time. Together with the real-time alignment and calibration of the detector, and a software infrastructure to make persistent the high-level physics objects produced during real-time processing, this redesign enabled the widespread deployment of real-time analysis during Run 2. We describe the design of the Run 2 trigger and real-time reconstruction, and present data-driven performance measurements for a representative sample of LHCb's physics programme.

hep-ex↗

arXiv2015

Simulation and performance of an artificial retina for 40 MHz track reconstruction

We present the results of a detailed simulation of the artificial retina pattern-recognition algorithm, designed to reconstruct events with hundreds of charged-particle tracks in pixel and silicon detectors at LHCb with LHC crossing frequency of $40\,\rm MHz$. Performances of the artificial retina algorithm are assessed using the official Monte Carlo samples of the LHCb experiment. We found performances for the retina pattern-recognition algorithm comparable with the full LHCb reconstruction algorithm.

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arXiv2014

The artificial retina processor for track reconstruction at the LHC crossing rate

We present results of an R&D study for a specialized processor capable of precisely reconstructing, in pixel detectors, hundreds of charged-particle tracks from high-energy collisions at 40 MHz rate. We apply a highly parallel pattern-recognition algorithm, inspired by studies of the processing of visual images by the brain as it happens in nature, and describe in detail an efficient hardware implementation in high-speed, high-bandwidth FPGA devices. This is the first detailed demonstration of reconstruction of offline-quality tracks at 40 MHz and makes the device suitable for processing Large Hadron Collider events at the full crossing frequency.

physics.ins-det↗

arXiv2014

The artificial retina for track reconstruction at the LHC crossing rate

We present the results of an R&D study for a specialized processor capable of precisely reconstructing events with hundreds of charged-particle tracks in pixel and silicon strip detectors at $40\,\rm MHz$, thus suitable for processing LHC events at the full crossing frequency. For this purpose we design and test a massively parallel pattern-recognition algorithm, inspired to the current understanding of the mechanisms adopted by the primary visual cortex of mammals in the early stages of visual-information processing. The detailed geometry and charged-particle's activity of a large tracking detector are simulated and used to assess the performance of the artificial retina algorithm. We find that high-quality tracking in large detectors is possible with sub-microsecond latencies when the algorithm is implemented in modern, high-speed, high-bandwidth FPGA devices.

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arXiv2014

First prototype of a silicon tracker using an artificial retina for fast track finding

We report on the R\&D for a first prototype of a silicon tracker based on an alternative approach for fast track finding. The working principle is inspired from neurobiology, in particular by the processing of visual images by the brain as it happens in nature. It is based on extensive parallelisation of data distribution and pattern recognition. In this work we present the design of a practical device that consists of a telescope based on single-sided silicon detectors; we describe the data acquisition system and the implementation of the track finding algorithms using available digital logic of commercial FPGA devices. Tracking performance and trigger capabilities of the device are discussed along with perspectives for future applications.

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arXiv2014

A Specialized Processor for Track Reconstruction at the LHC Crossing Rate

We present the results of an R&D study of a specialized processor capable of precisely reconstructing events with hundreds of charged-particle tracks in pixel detectors at 40 MHz, thus suitable for processing LHC events at the full crossing frequency. For this purpose we design and test a massively parallel pattern-recognition algorithm, inspired by studies of the processing of visual images by the brain as it happens in nature. We find that high-quality tracking in large detectors is possible with sub-$μ$s latencies when this algorithm is implemented in modern, high-speed, high-bandwidth FPGA devices. This opens a possibility of making track reconstruction happen transparently as part of the detector readout.

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arXiv2009

Charmless b-hadrons decays at CDF

We present CDF results on the branching fractions and time-integrated direct CP asymmetries for Bd, Bs and Lb decay modes into pairs of charmless charged hadrons (pions, kaons and protons). The data-set for these measurements amounts to 1fb^{-1} of pbar-p collisions at a center of mass energy 1.96TeV. We report on the first observation of the Bs->Kpi, Lb-ppi and Lb->pK decay modes and on the measurement of their branching fractions and direct CP asymmetries.

hep-ex↗