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Maik Stappers

Publications and source records attributed to Maik Stappers.

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Scalable and efficient grating couplers on low-index photonic platforms enabled by cryogenic deep silicon etching

Efficient fiber-to-chip couplers for multi-port access to photonic integrated circuits are paramount for a broad class of applications, ranging, e.g., from telecommunication to photonic computing and quantum technologies. While grating-based approaches are convenient for out-of-plane access and often desirable from a packaging point of view, on low-index photonic platforms, such as silicon nitride or thin-film lithium niobate, the limited grating strength has thus far hindered the achievement of coupling efficiencies comparable to the ones attainable in silicon photonics. Here we present a flexible strategy for the realization of highly efficient grating couplers on low-index photonic platforms. To simultaneously reach a high scattering efficiency and a near-unitary modal overlap with optical fibers, we make use of self-imaging gratings designed with a negative diffraction angle. To ensure high directionality of the diffracted light, we take advantage of a metal back-reflector patterned underneath the grating structure by cryogenic deep reactive ion etching of the silicon handle. Using silicon nitride as a testbed material, we experimentally demonstrate coupling efficiency up to -0.55 dB in the telecom C-band with near unity chip-scale device yield.

physics.app-ph

Parallel convolution processing using an integrated photonic tensor core

With the proliferation of ultra-high-speed mobile networks and internet-connected devices, along with the rise of artificial intelligence, the world is generating exponentially increasing amounts of data - data that needs to be processed in a fast, efficient and smart way. These developments are pushing the limits of existing computing paradigms, and highly parallelized, fast and scalable hardware concepts are becoming progressively more important. Here, we demonstrate a computational specific integrated photonic tensor core - the optical analog of an ASIC-capable of operating at Tera-Multiply-Accumulate per second (TMAC/s) speeds. The photonic core achieves parallelized photonic in-memory computing using phase-change memory arrays and photonic chip-based optical frequency combs (soliton microcombs). The computation is reduced to measuring the optical transmission of reconfigurable and non-resonant passive components and can operate at a bandwidth exceeding 14 GHz, limited only by the speed of the modulators and photodetectors. Given recent advances in hybrid integration of soliton microcombs at microwave line rates, ultra-low loss silicon nitride waveguides, and high speed on-chip detectors and modulators, our approach provides a path towards full CMOS wafer-scale integration of the photonic tensor core. While we focus on convolution processing, more generally our results indicate the major potential of integrated photonics for parallel, fast, and efficient computational hardware in demanding AI applications such as autonomous driving, live video processing, and next generation cloud computing services.

physics.optics