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Maja Cassidy

Publications and source records attributed to Maja Cassidy.

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Deterministic single-electron trapping on solid neon using engineered dielectric surface geometry

Levitating electron qubit on the surface of solid neon has recently emerged as a promising and intrinsically noise-resilient platform for quantum information processing. Their ultra-clean, inert environment suppresses conventional decoherence pathways associated with lattice disorder, charge traps, and nuclear-spin baths that limit coherence in semiconductor qubits. Yet, uncontrolled surface features such as bumps, valleys, and electrode-defined gaps can bind electrons unintentionally, contributing charge noise and inducing spin-orbit coupling mediated decoherence. To address this challenge, we propose an engineered interface in which a dielectric layer is deposited beneath the solid neon to provide an atomically smooth template, eliminating surface-roughness induced trapping. By selectively etching this dielectric layer at desired qubit locations, deterministic potential minima can be engineered to reliably capture electrons while suppressing unwanted surface bound states. We perform large-scale Schrodinger and Poisson simulation to compare the existing and proposed strategies of electron trapping on neon, obtaining good agreement with recent experimental measurements.

quant-ph

InAs-Al Hybrid Devices Passing the Topological Gap Protocol

We present measurements and simulations of semiconductor-superconductor heterostructure devices that are consistent with the observation of topological superconductivity and Majorana zero modes. The devices are fabricated from high-mobility two-dimensional electron gases in which quasi-one-dimensional wires are defined by electrostatic gates. These devices enable measurements of local and non-local transport properties and have been optimized via extensive simulations to ensure robustness against non-uniformity and disorder. Our main result is that several devices, fabricated according to the design's engineering specifications, have passed the topological gap protocol defined in Pikulin et al. [arXiv:2103.12217]. This protocol is a stringent test composed of a sequence of three-terminal local and non-local transport measurements performed while varying the magnetic field, semiconductor electron density, and junction transparencies. Passing the protocol indicates a high probability of detection of a topological phase hosting Majorana zero modes as determined by large-scale disorder simulations. Our experimental results are consistent with a quantum phase transition into a topological superconducting phase that extends over several hundred millitesla in magnetic field and several millivolts in gate voltage, corresponding to approximately one hundred micro-electron-volts in Zeeman energy and chemical potential in the semiconducting wire. These regions feature a closing and re-opening of the bulk gap, with simultaneous zero-bias conductance peaks at both ends of the devices that withstand changes in the junction transparencies. The extracted maximum topological gaps in our devices are 20-60 $μ$eV. This demonstration is a prerequisite for experiments involving fusion and braiding of Majorana zero modes.

cond-mat.mes-hall