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Manuel Escudero

Publications and source records attributed to Manuel Escudero.

3 recordsLinked to original sources

Physical Analogue Kolmogorov-Arnold Networks based on Reconfigurable Nonlinear-Processing Units

Kolmogorov-Arnold Networks (KANs) shift neural computation from linear layers to learnable nonlinear edge functions, but implementing these nonlinearities efficiently in hardware remains an open challenge. Here we introduce a physical analogue KAN architecture in which edge functions are realized in materia using reconfigurable nonlinear-processing units (RNPUs): multi-terminal nanoscale silicon devices whose input-output characteristics are tuned via control voltages. By combining multiple RNPUs into an edge processor and assembling these blocks into a reconfigurable analogue KAN (aKAN) architecture with integrated mixed-signal interfacing, we establish a realistic system-level hardware implementation that enables compact KAN-style regression and classification with programmable nonlinear transformations. Using experimentally calibrated RNPU models and hardware measurements, we demonstrate accurate function approximation across increasing task complexity while requiring fewer or comparable trainable parameters than multilayer perceptrons (MLPs). System-level estimates indicate an energy per inference of roughly 200 pJ and an end-to-end inference latency of roughly 0.6 $\mu$s for a representative workload, corresponding to over 100$\times$ reduction in energy accompanied by $>$10$\times$ reduction in area compared to a digital fixed-point MLP at similar approximation error. These results establish RNPUs as scalable, hardware-native nonlinear computing primitives and identify analogue KAN architectures as a realistic silicon-based pathway toward energy-, latency-, and footprint-efficient analogue neural-network hardware, particularly for edge inference.

cs.ET

Memristive chaotic circuit for information processing through time

Human brain processes sensory information in real-time with extraordinary efficiency compared to the possibilities of current artificial computing systems. It operates as a complex nonlinear system, composed of interacting dynamic units - neurons and synapses - that processes data-streams as time goes by, i.e. through time, using time as an internal self-standing variable. Here we report on a memristor-based compact chaotic circuit included in a computing architecture that can process information through time. We realized a hardware memristive version of the formally simplest chaotic circuit that, thanks to the nonlinearity of the nonvolatile memristor device, evolves with complex dynamics in response to a driving signal. The circuit is used in a single-node reservoir computing scheme to demonstrate nonlinear classification tasks and the processing of data streams through time. These results demonstrate that a simple memristor-based chaotic circuit has the potential to operate as a nonlinear dynamics-based computing system and to process temporal information through time.

cs.ET

Physical Implementation of a Tunable Memristor-based Chua's Circuit

Nonlinearity is a central feature in demanding computing applications that aim to deal with tasks such as optimization or classification. Furthermore, the consensus is that nonlinearity should not be only exploited at the algorithm level, but also at the physical level by finding devices that incorporate desired nonlinear features to physically implement energy, area and/or time efficient computing applications. Chaotic oscillators are one type of system powered by nonlinearity, which can be used for computing purposes. In this work we present a physical implementation of a tunable Chua's circuit in which the nonlinear part is based on a nonvolatile memristive device. Device characterization and circuit analysis serve as guidelines to design the circuit and results prove the possibility to tune the circuit oscillatory response by electrically programming the device.

cs.ET