arXiv subjects

Marc Dandin

Publications and source records attributed to Marc Dandin.

6 recordsLinked to original sources

arXiv2026

Direct Time-of-Flight Measurement Accuracy Improvement With Perimeter-Gated SPADs

Direct time of flight (dToF) measurements are susceptible to errors because of system-level and circuit-level timing jitters. In addition, device-level uncertainty stemming from the dark noise of single-photon avalanche diode (SPAD) contributes to the aggregated error. We demonstrate that perimeter gating can help reduce the device-level detection inaccuracy for SPAD devices by reducing the dark noise probability. Specifically, in this work, we developed a general framework to accurately estimate the dToF jitters stemming from different source levels and analyzed a counter-based time to digital converter (TDC) circuit that are commonly used in such systems. We have also measured dToFs using a perimeter-gated SPAD (pg-SPAD) detector fabricated in a 0.35 $\mu$m standard CMOS process. Experimental results show that pg-SPADs can improve measurement accuracy in both free-running and time-gated operations.

physics.ins-det↗

arXiv2026

Gate Voltage Effect on Pulse Detection Efficiency of Perimeter-Gated SPADs

Perimeter-gated single-photon avalanche diodes (pg-SPADs) are known for their dynamic dark noise modulation capabilities. They are reported to trade noise for photon sensitivity under continuous illumination. However, the implications of this trade-off have not heretofore been studied with pulsed optical systems. This work bridges this gap. We demonstrate that pg-SPADs fabricated in a 0.35 $\mu$m standard CMOS process trade-off pulse detection efficiency for a reduction in the the spread of spurious events within a burst window. Consequently, herein, we propose guidelines for the optimal use of pg-SPADs in pulsed LIDAR applications in view of the observed trade-off.

physics.ins-det↗

arXiv2026

Modeling of Dark Count Probability in Perimeter-Gated SPADs

This Letter presents a novel analytical framework showing that the dark count probability (PDC) of perimeter-gated single-photon avalanche diodes (pg-SPADs) follows a complementary Gompertz function. Specifically, we show that PDC follows a complementary Gompertz form from which we derive a pixel-specific descriptor, the midpoint perimeter gate voltage, which characterizes a pixel's equiprobable operating point. We further show that a perimeter gate voltage compensation rate may be obtained from this descriptor to offset temperature-induced changes in the pixel's activation function. The proposed framework is experimentally validated using 4,096 pg-SPADs arranged in a 64 x 64 array and manufactured in a 0.35 $\mu$m CMOS process. The devices were characterized at temperatures ranging from -5 $^o$C to 55 $^o$C and perimeter gate voltage magnitudes of 0 to 5 V. The measured results demonstrate deterministic bias control of dark count probability across process and temperature variations.

physics.ins-det↗

arXiv2026

Probabilistic approximate optimization using single-photon avalanche diode arrays

Combinatorial optimization problems are central to science and engineering and specialized hardware from quantum annealers to classical Ising machines are being actively developed to address them. These systems typically sample from a fixed energy landscape defined by the problem Hamiltonian encoding the discrete optimization problem. The recently introduced Probabilistic Approximate Optimization Algorithm (PAOA) takes a different approach: it treats the optimization landscape itself as variational, iteratively learning circuit parameters from samples. Here, we demonstrate PAOA on a 64$\times$64 perimeter-gated single-photon avalanche diode (pgSPAD) array fabricated in 0.35 $\mu$m CMOS, the first realization of the algorithm using intrinsically stochastic nanodevices. Each p-bit exhibits a device-specific, asymmetric (Gompertz-type) activation function due to dark-count variability. Rather than calibrating devices to enforce a uniform symmetric (logistic/tanh) activation, PAOA learns around device variations, absorbing residual activation and other mismatches into the variational parameters. On canonical 26-spin Sherrington-Kirkpatrick instances, PAOA achieves high approximation ratios with $2p$ parameters ($p$ up to 17 layers), and pgSPAD-based inference closely tracks CPU simulations. These results show that variational learning can accommodate the non-idealities inherent to nanoscale devices, suggesting a practical path toward larger-scale, CMOS-compatible probabilistic computers.

cs.ET↗

arXiv2025

Dynamic Watermark Generation for Digital Images using Perimeter Gated SPAD Imager PUFs

Digital image watermarks as a security feature can be derived from the imager's physically unclonable functions (PUFs) by utilizing the manufacturing variations, i.e., the dark signal non-uniformity (DSNU). While a few demonstrations focused on the CMOS image sensors (CIS) and active pixel sensors (APS), single photon avalanche diode (SPAD) imagers have never been investigated for this purpose. In this work, we have proposed a novel watermarking technique using perimeter gated SPAD (pgSPAD) imagers. We utilized the DSNU of three 64 x 64 pgSPAD imager chips, fabricated in a 0.35 {\mu}m standard CMOS process and analyzed the simulated watermarks for standard test images from publicly available database. Our observation shows that both source identification and tamper detection can be achieved using the proposed source-scene-specific dynamic watermarks with a controllable sensitivity-robustness trade-off.

cs.CV↗

arXiv2025

Bias Variation Compensation in Perimeter-Gated SPAD TRNGs

Random number generators that utilize arrays of entropy source elements suffer from bias variation (BV). Despite the availability of efficient debiasing algorithms, optimized implementations of hardware friendly options depend on the bit bias in the raw bit streams and cannot accommodate a wide BV. In this work, we present a 64 x 64 array of perimeter gated single photon avalanche diodes (pgSPADs), fabricated in a 0.35 {\mu}m standard CMOS technology, as a source of entropy to generate random binary strings with a BV compensation technique. By applying proper gate voltages based on the devices' native dark count rates, we demonstrate less than 1% BV for a raw-bit generation rate of 2 kHz/pixel at room temperature. The raw bits were debiased using the classical iterative Von Neumann's algorithm and the debiased bits were found to pass all of the 16 tests from NIST's Statistical Test Suite.

physics.ins-det↗