arXiv subjects

Marco Lisker

Publications and source records attributed to Marco Lisker.

6 recordsLinked to original sources

arXiv2026

Mobility Enhancement in Si/SiGe Quantum Well Enabled by a Buried Si Layer Trapping Oxygen Impurities

Reducing disorder in undoped Si/SiGe field-effect heterostructures remains an important materials challenge for scalable quantum devices, particularly electron spin qubits. Background impurities such as oxygen have been identified as mobility-limiting, yet practical heterostructure-design strategies for suppressing their incorporation remain underexplored, and their influence across different transport regimes is not fully established. Here, we demonstrate a simple route to oxygen reduction and mobility enhancement in Si/SiGe quantum-well heterostructures grown by reduced-pressure chemical vapor deposition (RP-CVD) on 200 mm Si(100) substrates through the introduction of a thin, electrically passive buried Si layer within the lower SiGe barrier. Secondary-ion mass spectrometry shows that the buried Si layer reproducibly reduces the oxygen background in the subsequently grown SiGe by approximately a factor of five, without modifying the active quantum-well region. Density- and temperature-dependent magnetotransport measurements further show that this reduction increases the electron mobility, while leaving the percolation density and density-dependent mobility scaling largely unchanged. Upon cooling to 0.3 K, both high- and low-oxygen devices exhibit similar density-dependent fractional mobility enhancements, indicating that the reduced oxygen background improves momentum relaxation without substantially altering the dominant low-density disorder landscape. These results establish the buried Si layer as a straightforward and process-compatible heterostructure-design element for reducing oxygen incorporation and improving transport in 200 mm CVD-grown Si/SiGe quantum-device materials.

cond-mat.mes-hall↗

arXiv2026

Enhanced intrinsic spin-orbit driving of a Loss-DiVincenzo qubit near the spin-valley hotspot in Si/SiGe

In most Si/SiGe-based spin qubit implementations, high-fidelity single-qubit gates are achieved using micromagnets, which enable the use of electric spin dipole resonance via synthetic spin-orbit coupling (s-SOC). In contrast, intrinsic spin-orbit coupling (i-SOC) in silicon is generally considered to be weak. However, in Si/SiGe heterostructures, theory predicts a substantial enhancement when the Zeeman splitting approaches the valley splitting if symmetry is reduced by an imperfect interface. Here, we demonstrate a Si/SiGe Loss-DiVincenzo qubit driven by i-SOC close to this so-called spin-valley hotspot. In particular, we characterize the Rabi frequency as a function of the energy detuning from the hotspot by sweeping both the magnetic field and quantum dot position. We observe the predicted enhancement of the Rabi frequency near the hotspot, but also find an asymmetry that deviates from existing theoretical models as well as distortions of the Chevron patterns near the hotspot. While we achieve an average single-qubit Clifford fidelity of 98.6 %, the strong variability of the valley splitting may impede the use of i-SOC-based control as a scalable operational strategy; understanding its effect is nevertheless important for reproducible high-fidelity control. Our results provide an empirical basis for refining current theoretical models of spin-valley physics in Si/SiGe heterostructures.

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arXiv2026

Disorder signatures emerging at millikelvin temperatures in Si/SiGe field-effect stacks

The performance and scalability of electron spin qubits based on gate-defined quantum-dots in undoped Si/SiGe field-effect stacks remain constrained by disorder originating from the gate stack. Its coupling to the quantum well can be reduced by increasing the Si quantum well depth, while electrostatic charge history, for example through interface-trap filling, can further modify the effective disorder landscape. Although such disorder is commonly benchmarked through mobility measurements using magnetotransport and Hall bar devices, dedicated investigations at millikelvin temperatures relevant for quantum-dot operation remain limited. Here, we use temperature-dependent magnetotransport on Hall bar shaped field-effect transistors to investigate how mobility-based disorder signatures depend on quantum-well depth and charge history from $1.5~\mathrm{K}$ down to the millikelvin regime. We show that magnetotransport characterization at $1.5~\mathrm{K}$ captures the dominant mobility improvement associated with reduced dielectric-interface coupling, but can underestimate disorder differences that emerge at millikelvin temperatures, particularly in the low-density regime. Our results therefore highlight that millikelvin magnetotransport characterization of Hall bar devices can provide additional insight for optimizing Si/SiGe field-effect stacks, particularly in the context of gate-defined quantum dot spin qubits.

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arXiv2025

High yield, low disorder Si/SiGe heterostructures for spin qubit devices manufactured in a BiCMOS pilot line

The prospect of achieving fault-tolerant quantum computing with semiconductor spin qubits in Si/SiGe heterostructures relies on the integration of a large number of identical devices, a feat achievable through a scalable (Bi)CMOS manufacturing approach. To this end, both the gate stack and the Si/SiGe heterostructure must be of high quality, exhibiting uniformity across the wafer and consistent performance across multiple fabrication runs. Here, we report a comprehensive investigation of Si/SiGe heterostructures and gate stacks, fabricated in an industry-standard 200 mm BiCMOS pilot line. We evaluate the homogeneity and reproducibility by probing the properties of the two-dimensional electron gas (2DEG) in the shallow silicon quantum well through magnetotransport characterization of Hall bar-shaped field-effect transistors at 1.5 K. Across all the probed wafers, we observe minimal variation of the 2DEG properties, with an average maximum mobility of $(4.25\pm0.17)\times 10^{5}$ cm$^{2}$/Vs and low percolation carrier density of $(5.9\pm0.18)\times 10^{10}$ cm$^{-2}$ evidencing low disorder potential in the quantum well. The observed narrow statistical distribution of the transport properties highlights the reproducibility and the stability of the fabrication process. Furthermore, wafer-scale characterization of a selected individual wafer evidenced the homogeneity of the device performances across the wafer area. Based on these findings, we conclude that our material and processes provide a suitable platform for the development of scalable, Si/SiGe-based quantum devices.

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arXiv2024

Impact of biased cooling on the operation of undoped silicon quantum well field-effect devices for quantum circuit applications

Gate-tunable semiconductor nanosystems are getting more and more important in the realization of quantum circuits. While such devices are typically cooled to operation temperature with zero bias applied to the gate, biased cooling corresponds to a non-zero gate voltage being applied before reaching the operation temperature. We systematically study the effect of biased cooling on different undoped SiGe/Si/SiGe quantum well field-effect stacks (FESs), designed to accumulate and density-tune two-dimensional electron gases (2DEGs). In an empirical model, we show that biased cooling of the undoped FES induces a static electric field, which is constant at operation temperature and superimposes onto the field exerted by the top gate onto the 2DEG. We show that the voltage operation window of the field-effect-tuned 2DEG can be chosen in a wide range of voltages via the choice of the biased cooling voltage. Importantly, quality features of the 2DEG such as the mobility or the temporal stability of the 2DEG density remain unaltered under biased cooling. We discuss how this additional degree of freedom in the tunability of FESs may be relevant for the operation of quantum circuits, in particular for the electrostatic control of spin qubits.

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arXiv2017

Hybrid Graphene/Silicon Schottky photodiode with intrinsic gating effect

We propose a hybrid device consisting of a graphene/silicon (Gr/Si) Schottky diode in parallel with a Gr/SiO2/Si capacitor for high-performance photodetection. The device, fabricated by transfer of commercial graphene on low-doped n-type Si substrate, achieves a photoresponse as high as 3 AW^(-1) and a normalized detectivity higher than 3.5 10^12 cmHz^(1/2) W^(-1) in the visible range. The device exhibits a photocurrent exceeding the forward current, because photo-generated minority carriers, accumulated at Si/SiO2 interface of the Gr/SiO2/Si capacitor, diffuse to the Gr/Si junction. We show that the same mechanism, when due to thermally generated carriers, although usually neglected or disregarded, causes the increased leakage often measured in Gr/Si heterojunctions. At room temperature, we measure a zero-bias Schottky barrier height of 0.52 eV, as well as an effective Richardson constant A**=4 10^(-5) Acm^(-2) K^(-2) and an ideality factor n=3.6, explained by a thin (< 1nm) oxide layer at the Gr/Si interface.

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