Petri Net Description of Biological Neural Circuits for Fast Hardware Prototyping
Current approaches to simulating biological neural circuits, whether on general-purpose hardware or dedicated neuromorphic platforms, remain constrained by fixed-timestep numerical integration, hardware-imposed precision limits, and an inability to guarantee timing correctness for event-driven spiking dynamics under real-time constraints. Here, we propose a Petri net description of biological neural circuits that overcomes these limitations by modeling neurons, synapses, and spike events as a T-timed Petri net with formally verifiable timing semantics, enabling deadline-guaranteed real-time execution and analytically tractable correspondence to continuous-time leak-integrate-and-fire dynamics, independent of the underlying integration timestep. To test the model, we present the results of three simulated microcircuits: feedback inhibition, lateral inhibition, and hierarchical feature detector. The Petri neuron reproduces the expected dynamical signatures of each circuit while providing formally bounded timing guarantees throughout, with worst-case response times matching analytical predictions across all three cases.