arXiv subjects

Martin Suchara

Publications and source records attributed to Martin Suchara.

34 records · Page 2Linked to original sources

arXiv2021

Parallel Simulation of Quantum Networks with Distributed Quantum State Management

Quantum network simulators offer the opportunity to cost-efficiently investigate potential avenues to building networks that scale with the number of users, communication distance, and application demands by simulating alternative hardware designs and control protocols. Several quantum network simulators have been recently developed with these goals in mind. However, as the size of the simulated networks increases, sequential execution becomes time consuming. Parallel execution presents a suitable method for scalable simulations of large-scale quantum networks, but the unique attributes of quantum information create some unexpected challenges. In this work we identify requirements for parallel simulation of quantum networks and develop the first parallel discrete event quantum network simulator by modifying the existing serial SeQUeNCe simulator. Our contributions include the design and development of a quantum state manager (QSM) that maintains shared quantum information distributed across multiple processes. We also optimize our parallel code by minimizing the overhead of the QSM and decreasing the amount of synchronization among processes. Using these techniques, we observe a speedup of 2 to 25 times when simulating a 1,024-node linear network with 2 to 128 processes. We also observe efficiency greater than 0.5 for up to 32 processes in a linear network topology of the same size and with the same workload. We repeat this evaluation with a randomized workload on a caveman network. Finally, we also introduce several methods for partitioning networks by mapping them to different parallel simulation processes. We released the parallel SeQUeNCe simulator as an open-source tool alongside the existing sequential version.

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arXiv2021

Faster and More Reliable Quantum SWAPs via Native Gates

Due to the sparse connectivity of superconducting quantum computers, qubit communication via SWAP gates accounts for the vast majority of overhead in quantum programs. We introduce a method for improving the speed and reliability of SWAPs at the level of the superconducting hardware's native gateset. Our method relies on four techniques: 1) SWAP Orientation, 2) Cross-Gate Pulse Cancellation, 3) Commutation through Cross-Resonance, and 4) Cross-Resonance Polarity. Importantly, our Optimized SWAP is bootstrapped from the pre-calibrated gates, and therefore incurs zero calibration overhead. We experimentally evaluate our optimizations with Qiskit Pulse on IBM hardware. Our Optimized SWAP is 11% faster and 13% more reliable than the Standard SWAP. We also experimentally validate our optimizations on application-level benchmarks. Due to (a) the multiplicatively compounding gains from improved SWAPs and (b) the frequency of SWAPs, we observe typical improvements in success probability of 10-40%. The Optimized SWAP is available through the SuperstaQ platform.

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arXiv2021

Approaches to Constrained Quantum Approximate Optimization

We study the costs and benefits of different quantum approaches to finding approximate solutions of constrained combinatorial optimization problems with a focus on Maximum Independent Set. In the Lagrange multiplier approach we analyze the dependence of the output on graph density and circuit depth. The Quantum Alternating Ansatz Approach is then analyzed and we examine the dependence on different choices of initial states. The Quantum Alternating Ansatz Approach, although powerful, is expensive in terms of quantum resources. A new algorithm based on a "Dynamic Quantum Variational Ansatz" (DQVA) is proposed that dynamically changes to ensure the maximum utilization of a fixed allocation of quantum resources. Our analysis and the new proposed algorithm can also be generalized to other related constrained combinatorial optimization problems.

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arXiv2021

CutQC: Using Small Quantum Computers for Large Quantum Circuit Evaluations

Quantum computing (QC) is a new paradigm offering the potential of exponential speedups over classical computing for certain computational problems. Each additional qubit doubles the size of the computational state space available to a QC algorithm. This exponential scaling underlies QC's power, but today's Noisy Intermediate-Scale Quantum (NISQ) devices face significant engineering challenges in scalability. The set of quantum circuits that can be reliably run on NISQ devices is limited by their noisy operations and low qubit counts. This paper introduces CutQC, a scalable hybrid computing approach that combines classical computers and quantum computers to enable evaluation of quantum circuits that cannot be run on classical or quantum computers alone. CutQC cuts large quantum circuits into smaller subcircuits, allowing them to be executed on smaller quantum devices. Classical postprocessing can then reconstruct the output of the original circuit. This approach offers significant runtime speedup compared with the only viable current alternative--purely classical simulations--and demonstrates evaluation of quantum circuits that are larger than the limit of QC or classical simulation. Furthermore, in real-system runs, CutQC achieves much higher quantum circuit evaluation fidelity using small prototype quantum computers than the state-of-the-art large NISQ devices achieve. Overall, this hybrid approach allows users to leverage classical and quantum computing resources to evaluate quantum programs far beyond the reach of either one alone.

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arXiv2021

Quantum Circuit Cutting with Maximum Likelihood Tomography

We introduce maximum likelihood fragment tomography (MLFT) as an improved circuit cutting technique for running clustered quantum circuits on quantum devices with a limited number of qubits. In addition to minimizing the classical computing overhead of circuit cutting methods, MLFT finds the most likely probability distribution for the output of a quantum circuit, given the measurement data obtained from the circuit's fragments. We demonstrate the benefits of MLFT for accurately estimating the output of a fragmented quantum circuit with numerical experiments on random unitary circuits. Finally, we show that circuit cutting can estimate the output of a clustered circuit with higher fidelity than full circuit execution, thereby motivating the use of circuit cutting as a standard tool for running clustered circuits on quantum hardware.

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arXiv2021

Term Grouping and Travelling Salesperson for Digital Quantum Simulation

Digital simulation of quantum dynamics by evaluating the time evolution of a Hamiltonian is the initially proposed application of quantum computing. The large number of quantum gates required for emulating the complete second quantization form of the Hamiltonian, however, makes such an approach unsuitable for near-term devices with limited gate fidelities that cause high physical errors. In addition, Trotter error caused by noncommuting terms can accumulate and harm the overall circuit fidelity, thus causing algorithmic errors. In this paper, we propose a new term ordering strategy, max-commute-tsp (MCTSP), that simultaneously mitigates both algorithmic and physical errors. First, we improve the Trotter fidelity compared with previously proposed optimization by reordering Pauli terms and partitioning them into commuting families. We demonstrate the practicality of this method by constructing and evaluating quantum circuits that simulate different molecular Hamiltonians, together with theoretical explanations for the fidelity improvements from our term grouping method. Second, we describe a new gate cancellation technique that reduces the high gate counts by formulating the gate cancellation problem as a travelling salesperson problem, together with benchmarking experiments. Finally, we also provide benchmarking results that demonstrate the combined advantage of max-commute-tsp to mitigate both physical and algorithmic errors via quantum circuit simulation under realistic noise models.

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arXiv2021

Quantum Divide and Compute: Exploring The Effect of Different Noise Sources

Our recent work (Ayral et al., 2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)) showed the first implementation of the Quantum Divide and Compute (QDC) method, which allows to break quantum circuits into smaller fragments with fewer qubits and shallower depth. QDC can thus deal with the limited number of qubits and short coherence times of noisy, intermediate-scale quantum processors. This article investigates the impact of different noise sources -- readout error, gate error and decoherence -- on the success probability of the QDC procedure. We perform detailed noise modeling on the Atos Quantum Learning Machine, allowing us to understand tradeoffs and formulate recommendations about which hardware noise sources should be preferentially optimized. We describe in detail the noise models we used to reproduce experimental runs on IBM's Johannesburg processor. This work also includes a detailed derivation of the equations used in the QDC procedure to compute the output distribution of the original quantum circuit from the output distribution of its fragments. Finally, we analyze the computational complexity of the QDC method for the circuit under study via tensor-network considerations, and elaborate on the relation the QDC method with tensor-network simulation methods.

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arXiv2020

SeQUeNCe: A Customizable Discrete-Event Simulator of Quantum Networks

Recent advances in quantum information science enabled the development of quantum communication network prototypes and created an opportunity to study full-stack quantum network architectures. This work develops SeQUeNCe, a comprehensive, customizable quantum network simulator. Our simulator consists of five modules: Hardware models, Entanglement Management protocols, Resource Management, Network Management, and Application. This framework is suitable for simulation of quantum network prototypes that capture the breadth of current and future hardware technologies and protocols. We implement a comprehensive suite of network protocols and demonstrate the use of SeQUeNCe by simulating a photonic quantum network with nine routers equipped with quantum memories. The simulation capabilities are illustrated in three use cases. We show the dependence of quantum network throughput on several key hardware parameters and study the impact of classical control message latency. We also investigate quantum memory usage efficiency in routers and demonstrate that redistributing memory according to anticipated load increases network capacity by 69.1% and throughput by 6.8%. We design SeQUeNCe to enable comparisons of alternative quantum network technologies, experiment planning, and validation and to aid with new protocol design. We are releasing SeQUeNCe as an open source tool and aim to generate community interest in extending it.

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arXiv2020

Quantum Divide and Compute: Hardware Demonstrations and Noisy Simulations

Noisy, intermediate-scale quantum computers come with intrinsic limitations in terms of the number of qubits (circuit "width") and decoherence time (circuit "depth") they can have. Here, for the first time, we demonstrate a recently introduced method that breaks a circuit into smaller subcircuits or fragments, and thus makes it possible to run circuits that are either too wide or too deep for a given quantum processor. We investigate the behavior of the method on one of IBM's 20-qubit superconducting quantum processors with various numbers of qubits and fragments. We build noise models that capture decoherence, readout error, and gate imperfections for this particular processor. We then carry out noisy simulations of the method in order to account for the observed experimental results. We find an agreement within 20% between the experimental and the simulated success probabilities, and we observe that recombining noisy fragments yields overall results that can outperform the results without fragmentation.

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arXiv2019

Minimizing State Preparations in Variational Quantum Eigensolver by Partitioning into Commuting Families

Variational quantum eigensolver (VQE) is a promising algorithm suitable for near-term quantum machines. VQE aims to approximate the lowest eigenvalue of an exponentially sized matrix in polynomial time. It minimizes quantum resource requirements both by co-processing with a classical processor and by structuring computation into many subproblems. Each quantum subproblem involves a separate state preparation terminated by the measurement of one Pauli string. However, the number of such Pauli strings scales as $N^4$ for typical problems of interest--a daunting growth rate that poses a serious limitation for emerging applications such as quantum computational chemistry. We introduce a systematic technique for minimizing requisite state preparations by exploiting the simultaneous measurability of partitions of commuting Pauli strings. Our work encompasses algorithms for efficiently approximating a MIN-COMMUTING-PARTITION, as well as a synthesis tool for compiling simultaneous measurement circuits. For representative problems, we achieve 8-30x reductions in state preparations, with minimal overhead in measurement circuit cost. We demonstrate experimental validation of our techniques by estimating the ground state energy of deuteron on an IBM Q 20-qubit machine. We also investigate the underlying statistics of simultaneous measurement and devise an adaptive strategy for mitigating harmful covariance terms.

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arXiv2014

Leakage Suppression in the Toric Code

Quantum codes excel at correcting local noise but fail to correct leakage faults that excite qubits to states outside the computational space. Aliferis and Terhal have shown that an accuracy threshold exists for leakage faults using gadgets called leakage reduction units (LRUs). However, these gadgets reduce the accuracy threshold and can increase overhead and experimental complexity, and these costs have not been thoroughly understood. Our work explores a variety of techniques for leakage-resilient, fault-tolerant error correction in the context of topological codes. Our contributions are threefold. First, we develop a leakage model that differs in critical details from earlier models. Second, we use Monte-Carlo simulations to survey several syndrome extraction circuits. Third, given the capability to perform three-outcome measurements, we present a dramatically improved syndrome processing algorithm. Our simulation results show that simple circuits with one extra CNOT per qubit and no additional ancillas reduce the accuracy threshold by less than a factor of 4 when leakage and depolarizing noise rates are comparable. This becomes a factor of 2 when the decoder uses 3-outcome measurements. Finally, when the physical error rate is less than 2 x 10^-4, placing LRUs after every gate may achieve the lowest logical error rates of all of the circuits we considered. We expect the closely related planar and rotated codes to exhibit the same accuracy thresholds and that the ideas may generalize naturally to other topological codes.

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arXiv2014

Efficient Algorithms for Maximum Likelihood Decoding in the Surface Code

We describe two implementations of the optimal error correction algorithm known as the maximum likelihood decoder (MLD) for the 2D surface code with a noiseless syndrome extraction. First, we show how to implement MLD exactly in time $O(n^2)$, where $n$ is the number of code qubits. Our implementation uses a reduction from MLD to simulation of matchgate quantum circuits. This reduction however requires a special noise model with independent bit-flip and phase-flip errors. Secondly, we show how to implement MLD approximately for more general noise models using matrix product states (MPS). Our implementation has running time $O(nχ^3)$ where $χ$ is a parameter that controls the approximation precision. The key step of our algorithm, borrowed from the DMRG method, is a subroutine for contracting a tensor network on the two-dimensional grid. The subroutine uses MPS with a bond dimension $χ$ to approximate the sequence of tensors arising in the course of contraction. We benchmark the MPS-based decoder against the standard minimum weight matching decoder observing a significant reduction of the logical error probability for $χ\ge 4$.

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arXiv2013

Subsystem surface codes with three-qubit check operators

We propose a simplified version of the Kitaev's surface code in which error correction requires only three-qubit parity measurements for Pauli operators XXX and ZZZ. The new code belongs to the class of subsystem stabilizer codes. It inherits many favorable properties of the standard surface code such as encoding of multiple logical qubits on a planar lattice with punctured holes, efficient decoding by either minimum-weight matching or renormalization group methods, and high error threshold. The new subsystem surface code (SSC) gives rise to an exactly solvable Hamiltonian with 3-qubit interactions, topologically ordered ground state, and a constant energy gap. We construct a local unitary transformation mapping the SSC Hamiltonian to the one of the ordinary surface code thus showing that the two Hamiltonians belong to the same topological class. We describe error correction protocols for the SSC and determine its error thresholds under several natural error models. In particular, we show that the SSC has error threshold approximately 0.6% for the standard circuit-based error model studied in the literature. We also consider a model in which three-qubit parity operators can be measured directly. We show that the SSC has error threshold approximately 0.97% in this setting.

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arXiv2013

Comparing the Overhead of Topological and Concatenated Quantum Error Correction

This work compares the overhead of quantum error correction with concatenated and topological quantum error-correcting codes. To perform a numerical analysis, we use the Quantum Resource Estimator Toolbox (QuRE) that we recently developed. We use QuRE to estimate the number of qubits, quantum gates, and amount of time needed to factor a 1024-bit number on several candidate quantum technologies that differ in their clock speed and reliability. We make several interesting observations. First, topological quantum error correction requires fewer resources when physical gate error rates are high, white concatenated codes have smaller overhead for physical gate error rates below approximately 10E-7. Consequently, we show that different error-correcting codes should be chosen for two of the studied physical quantum technologies - ion traps and superconducting qubits. Second, we observe that the composition of the elementary gate types occurring in a typical logical circuit, a fault-tolerant circuit protected by the surface code, and a fault-tolerant circuit protected by a concatenated code all differ. This also suggests that choosing the most appropriate error correction technique depends on the ability of the future technology to perform specific gates efficiently.

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arXiv2013

Performance and Error Analysis of Knill's Postselection Scheme in a Two-Dimensional Architecture

Knill demonstrated a fault-tolerant quantum computation scheme based on concatenated error-detecting codes and postselection with a simulated error threshold of 3% over the depolarizing channel. %We design a two-dimensional architecture for fault-tolerant quantum computation based on Knill's postselection scheme. We show how to use Knill's postselection scheme in a practical two-dimensional quantum architecture that we designed with the goal to optimize the error correction properties, while satisfying important architectural constraints. In our 2D architecture, one logical qubit is embedded in a tile consisting of $5\times 5$ physical qubits. The movement of these qubits is modeled as noisy SWAP gates and the only physical operations that are allowed are local one- and two-qubit gates. We evaluate the practical properties of our design, such as its error threshold, and compare it to the concatenated Bacon-Shor code and the concatenated Steane code. Assuming that all gates have the same error rates, we obtain a threshold of $3.06\times 10^{-4}$ in a local adversarial stochastic noise model, which is the highest known error threshold for concatenated codes in 2D. We also present a Monte Carlo simulation of the 2D architecture with depolarizing noise and we calculate a pseudo-threshold of about 0.1%. With memory error rates one-tenth of the worst gate error rates, the threshold for the adversarial noise model, and the pseudo-threshold over depolarizing noise, are $4.06\times 10^{-4}$ and 0.2%, respectively. In a hypothetical technology where memory error rates are negligible, these thresholds can be further increased by shrinking the tiles into a $4\times 4$ layout.

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arXiv2010

Constructions and Noise Threshold of Topological Subsystem Codes

Topological subsystem codes proposed recently by Bombin are quantum error correcting codes defined on a two-dimensional grid of qubits that permit reliable quantum information storage with a constant error threshold. These codes require only the measurement of two-qubit nearest-neighbor operators for error correction. In this paper we demonstrate that topological subsystem codes (TSCs) can be viewed as generalizations of Kitaev's honeycomb model to trivalent hypergraphs. This new connection provides a systematic way of constructing TSCs and analyzing their properties. We also derive a necessary and sufficient condition under which a syndrome measurement in a subsystem code can be reduced to measurements of the gauge group generators. Furthermore, we propose and implement some candidate decoding algorithms for one particular TSC assuming perfect error correction. Our Monte Carlo simulations indicate that this code, which we call the five-squares code, has a threshold against depolarizing noise of at least 2%.

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