Advanced superconducting circuits and devices
Short review on advanced superconducting circuits and devices.
arXiv subjects
Publications and source records attributed to Martin Weides.
Short review on advanced superconducting circuits and devices.
We present a superconducting qubit design that is fabricated in a 2D geometry over a superconducting ground plane to enhance the lifetime. The qubit is coupled to a microstrip resonator for readout. The circuit is fabricated on a silicon substrate using low loss, stoichiometric titanium nitride for capacitor pads and small, shadow-evaporated aluminum/aluminum-oxide junctions. We observe qubit relaxation and coherence times ($T_1$ and $T_2$) of 11.7 $\pm$ 0.2 $μ$s and 8.7 $\pm$ 0.3 $μ$s, respectively. Calculations show that the proximity of the superconducting plane suppresses the otherwise high radiation loss of the qubit. A significant increase in $T_1$ is projected for a reduced qubit-to-superconducting plane separation.
We propose a sequence of pulses intended to preserve the state of a qubit in the presence of strong, coherent coupling to another quantum system. The sequence can be understood as a generalized SWAP and works in formal analogy to the well-known spin echo. Since the resulting effective decoherence rate of the qubits state is strongly influenced by the additional system, this sequence might serve to protect its quantum state as well as negating the effects of the coherent coupling. A possible area of application are large scale quantum computing architectures, where spectral crowding of the resources might necessitate a method to mitigate residual couplings.
We have investigated the correlation between the microwave loss and patterning method for coplanar waveguide titanium nitride resonators fabricated on Si wafers. Three different methods were investigated: fluorine- and chlorine-based reactive ion etches and an argon-ion mill. At high microwave probe powers the reactive etched resonators showed low internal loss, whereas the ion-milled samples showed dramatically higher loss. At single-photon powers we found that the fluorine-etched resonators exhibited substantially lower loss than the chlorine-etched ones. We interpret the results by use of numerically calculated filling factors and find that the silicon surface exhibits a higher loss when chlorine-etched than when fluorine-etched. We also find from microscopy that re-deposition of silicon onto the photoresist and side walls is the probable cause for the high loss observed for the ion-milled resonators
We present a fabrication scheme and testing results for epitaxial sub-micrometer Josephson junctions. The junctions are made using a high-temperature (1170 K) "via process" yielding junctions as small as 0.8 mu m in diameter by use of optical lithography. Sapphire (Al2O3) tunnel-barriers are grown on an epitaxial Re/Ti multilayer base-electrode. We have fabricated devices with both Re and Al top electrodes. While room-temperature (295 K) resistance versus area data are favorable for both types of top electrodes, the low-temperature (50 mK) data show that junctions with the Al top electrode have a much higher subgap resistance. The microwave loss properties of the junctions have been measured by use of superconducting Josephson junction qubits. The results show that high subgap resistance correlates to improved qubit performance.
Minimizing phase and other errors in experimental quantum gates allows higher fidelity quantum processing. To quantify and correct for phase errors in particular, we have developed a new experimental metrology --- amplified phase error (APE) pulses --- that amplifies and helps identify phase errors in general multi-level qubit architectures. In order to correct for both phase and amplitude errors specific to virtual transitions and leakage outside of the qubit manifold, we implement "half derivative" an experimental simplification of derivative reduction by adiabatic gate (DRAG) control theory. The phase errors are lowered by about a factor of five using this method to $\sim 1.6^{\circ}$ per gate, and can be tuned to zero. Leakage outside the qubit manifold, to the qubit $|2\rangle$ state, is also reduced to $\sim 10^{-4}$ for $20\%$ faster gates.
We present novel low-T_c superconductor-insulator-ferromagnet-superconductor (SIFS) Josephson junctions with planar and stepped ferromagnetic interlayer. We optimized the fabrication process to set a step in the ferromagnetic layer thickness. Depending on the thickness of the ferromagnetic layer the ground state of the SIFS junction has a phase drop of either 0 or pi. So-called 0-pi Josephson junctions, in which 0 and pi ground states compete with each other, were obtained. These stepped junctions may have a double degenerate ground state, corresponding to a vortex of supercurrent circulating clock- or counterclockwise and creating a magnetic flux which carries a fraction of the magnetic flux quantum Φ_0. Here, we limit the presentation to static properties of short junctions.