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Maud Vinet

Publications and source records attributed to Maud Vinet.

At least 19 recordsLinked to original sources

A foundry-fabricated spin qubit unit cell with in-situ dispersive readout

Spin qubits based on semiconductor quantum dots are a promising prospect for quantum computation because of their high coherence times and gate fidelities. However, scaling up those structures to the numbers required by fault-tolerant quantum computing is currently hampered by a number of issues. One of the main issues is the need for single-shot low-footprint qubit readout. Here, we demonstrate the single-shot in situ measurement of a compact qubit unit-cell. The unit cell is composed of two electron spins with a controllable exchange interaction. We report initialization, single-shot readout and two-electron entangling gate. The unit cell was successfully operated at up to 1 K, with state-of-the-art charge noise levels extracted using free induction decay. With its integrated readout and high stability, this foundry fabricated qubit unit cell demonstrates strong potential for scalable quantum computing architectures.

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Transport characterization and quantum dot coupling in commercial 22FDX

Different groups worldwide have been working with the GlobalFoundries 22nm platform (22FDX) with the hopes of industrializing the fabrication of Si spin qubits. To guide this effort, we have performed a systematic study of six of the foundry's processes of reference (POR). Using effective mobility as a figure of merit, we study the impact of gate stack, channel type and back bias as a function of temperature. This screening process selected qubit devices that allowed us to couple quantum dots along both the length and width of the Si channel. We present stability diagrams with clear and regular honeycomb patterns, where spurious elements such as dopants are not observed. By combining these results with room and low temperature simulations, we provide insights into potential technology optimizations and show both the utility of qubit pre-screening protocols as well as the advantages of leveraging forward body bias within an FDSOI (Fully Depleted Silicon-On-Insulator) qubit platform.

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Combining multiplexed gate-based readout and isolated CMOS quantum dot arrays

Semiconductor quantum dot arrays are a promising platform to perform spin-based error-corrected quantum computation with large numbers of qubits. However, due to the diverging number of possible charge configurations combined with the limited sensitivity of large-footprint charge sensors, achieving single-spin occupancy in each dot in a growing quantum dot array is exceedingly complex. Therefore, to scale-up a spin-based architecture we must change how individual charges are readout and controlled. Here, we demonstrate single-spin occupancy of each dot in a foundry-fabricated array by combining two methods. 1/ Loading a finite number of electrons into the quantum dot array; simplifying electrostatic tuning by isolating the array from the reservoirs. 2/ Deploying multiplex gate-based reflectometry to dispersively probe charge tunneling and spin states without charge sensors or reservoirs. Our isolated arrays probed by embedded multiplex readout can be readily electrostatically tuned. They are thus a viable, scalable approach for spin-based quantum architectures.

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Broadband parametric amplification for multiplexed SiMOS quantum dot signals

Spins in semiconductor quantum dots hold great promise as building blocks of quantum processors. Trapping them in SiMOS transistor-like devices eases future industrial scale fabrication. Among the potentially scalable readout solutions, gate-based dispersive radiofrequency reflectometry only requires the already existing transistor gates to readout a quantum dot state, relieving the need for additional elements. In this effort towards scalability, traveling-wave superconducting parametric amplifiers significantly enhance the readout signal-to-noise ratio (SNR) by reducing the noise below typical cryogenic low-noise amplifiers, while offering a broad amplification band, essential to multiplex the readout of multiple resonators. In this work, we demonstrate a 3GHz gate-based reflectometry readout of electron charge states trapped in quantum dots formed in SiMOS multi-gate devices, with SNR enhanced thanks to a Josephson traveling-wave parametric amplifier (JTWPA). The broad, tunable 2GHz amplification bandwidth combined with more than 10dB ON/OFF SNR improvement of the JTWPA enables frequency and time division multiplexed readout of interdot transitions, and noise performance near the quantum limit. In addition, owing to a design without superconducting loops and with a metallic ground plane, the JTWPA is flux insensitive and shows stable performances up to a magnetic field of 1.2T at the quantum dot device, compatible with standard SiMOS spin qubit experiments.

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Electrical manipulation of a single electron spin in CMOS with micromagnet and spin-valley coupling

For semiconductor spin qubits, complementary-metal-oxide-semiconductor (CMOS) technology is the ideal candidate for reliable and scalable fabrication. Making the direct leap from academic fabrication to qubits fabricated fully by industrial CMOS standards is difficult without intermediate solutions. With a flexible back-end-of-line (BEOL) new functionalities such as micromagnets or superconducting circuits can be added in a post-CMOS process to study the physics of these devices or achieve proof of concepts. Once the process is established it can be incorporated in the foundry-compatible process flow. Here, we study a single electron spin qubit in a CMOS device with a micromagnet integrated in the flexible BEOL. We exploit the synthetic spin orbit coupling (SOC) to control the qubit via electric field and we investigate the spin-valley physics in the presence of SOC where we show an enhancement of the Rabi frequency at the spin-valley hotspot. Finally, we probe the high frequency noise in the system using dynamical decoupling pulse sequences and demonstrate that charge noise dominates the qubit decoherence in this range.

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Probing charge noise in few electron CMOS quantum dots

Charge noise is one of the main sources of environmental decoherence for spin qubits in silicon, presenting a major obstacle in the path towards highly scalable and reproducible qubit fabrication. Here we demonstrate in-depth characterization of the charge noise environment experienced by a quantum dot in a CMOS-fabricated silicon nanowire. We probe the charge noise for different quantum dot configurations, finding that it is possible to tune the charge noise over two orders of magnitude, ranging from 1 ueV^2 to 100 ueV^2. In particular, we show that the top interface and the reservoirs are the main sources of charge noise and their effect can be mitigated by controlling the quantum dot extension. Additionally, we demonstrate a novel method for the measurement of the charge noise experienced by a quantum dot in the few electron regime. We measure a comparatively higher charge noise value of 40 ueV^2 at the first electron, and demonstrate that the charge noise is highly dependent on the electron occupancy of the quantum dot.

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Parity and singlet-triplet high fidelity readout in a silicon double quantum dot at 0.5 K

We demonstrate singlet-triplet readout and parity readout allowing to distinguish T0 and the polarized triplet states. We achieve high fidelity spin readout with an average fidelity above $99.9\%$ for a readout time of $20~\mu$s and $99\%$ for $4~\mu$s at a temperature of $0.5~K$. We initialize a singlet state in a single dot with a fidelity higher than $99\%$ and separate the two electrons while keeping the same spin state with $a \approx 95.6\%$ fidelity.

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Strong coupling between a photon and a hole spin in silicon

Spins in semiconductor quantum dots constitute a promising platform for scalable quantum information processing. Coupling them strongly to the photonic modes of superconducting microwave resonators would enable fast non-demolition readout and long-range, on-chip connectivity, well beyond nearest-neighbor quantum interactions. Here we demonstrate strong coupling between a microwave photon in a superconducting resonator and a hole spin in a silicon-based double quantum dot issued from a foundry-compatible MOS fabrication process. By leveraging the strong spin-orbit interaction intrinsically present in the valence band of silicon, we achieve a spin-photon coupling rate as high as 330~MHz largely exceeding the combined spin-photon decoherence rate. This result, together with the recently demonstrated long coherence of hole spins in silicon, opens a new realistic pathway to the development of circuit quantum electrodynamics with spins in semiconductor quantum dots.

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Superconducting routing platform for large-scale integration of quantum technologies

To reach large-scale quantum computing, three-dimensional integration of scalable qubit arrays and their control electronics in multi-chip assemblies is promising. Within these assemblies, the use of superconducting interconnections, as routing layers, offers interesting perspective in terms of (1) thermal management to protect the qubits from control electronics self-heating, (2) passive device performance with significant increase of quality factors and (3) density rise of low and high frequency signals thanks to minimal dispersion. We report on the fabrication, using 200 mm silicon wafer technologies, of a multi-layer routing platform designed for the hybridization of spin qubit and control electronics chips. A routing level couples the qubits and the control circuits through one layer of Al0.995Cu0.005 and superconducting layers of TiN, Nb or NbN, connected between them by W-based vias. Wafer-level parametric tests at 300 K validate the yield of these technologies and low temperature electrical measurements in cryostat are used to extract the superconducting properties of the routing layers. Preliminary low temperature radio-frequency characterizations of superconducting passive elements, embedded in these routing levels, are presented.

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Quantum Dot-Based Parametric Amplifiers

Josephson parametric amplifiers (JPAs) approaching quantum-limited noise performance have been instrumental in enabling high fidelity readout of superconducting qubits and, recently, semiconductor quantum dots (QDs). We propose that the quantum capacitance arising in electronic two-level systems (the dual of Josephson inductance) can provide an alternative dissipation-less non-linear element for parametric amplification. We experimentally demonstrate phase-sensitive parametric amplification using a QD-reservoir electron transition in a CMOS nanowire split-gate transistor embedded in a 1.8~GHz superconducting lumped-element microwave cavity, achieving parametric gains of -3 to +3 dB, limited by Sisyphus dissipation. Using a semi-classical model, we find an optimised design within current technological capabilities could achieve gains and bandwidths comparable to JPAs, while providing complementary specifications with respect to integration in semiconductor platforms or operation at higher magnetic fields.

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Non-reciprocal Pauli Spin Blockade in a Silicon Double Quantum Dot

Spin qubits in gate-defined silicon quantum dots are receiving increased attention thanks to their potential for large-scale quantum computing. Readout of such spin qubits is done most accurately and scalably via Pauli spin blockade (PSB), however various mechanisms may lift PSB and complicate readout. In this work, we present an experimental observation of a new, highly prevalent PSB-lifting mechanism in a silicon double quantum dot due to incoherent tunneling between different spin manifolds. Through dispersively-detected magnetospectroscopy of the double quantum dot in 16 charge configurations, we find the mechanism to be energy-level selective and non-reciprocal for neighbouring charge configurations. Additionally, using input-output theory we report a large coupling of different electron spin manifolds of 7.90 $\mu$eV, the largest reported to date, indicating an enhanced spin-orbit coupling which may enable all-electrical qubit control.

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Spin-valley coupling anisotropy and noise in CMOS quantum dots

One of the main advantages of silicon spin qubits over other solid-state qubits is their inherent scalability and compatibility with the 300 mm CMOS fabrication technology that is already widely used in the semiconductor industry, whilst maintaining high readout and gate fidelities. We demonstrate detection of a single electron spin using energy-selective readout in a CMOS-fabricated nanowire device with an integrated charge detector. We measure a valley splitting of 0.3 meV and 0.16 meV in two similar devices. The anisotropy of the spin-valley mixing is measured and shown to follow the dependence expected from the symmetry of the local confinement, indicating low disorder in the region of the quantum dot. Finally the charge noise in the spin-valley coupling regime is investigated and found to induce fluctuations in the qubit energy in the range of $0.6GHz/\sqrt{Hz}$.

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Dispersively probed microwave spectroscopy of a silicon hole double quantum dot

Owing to ever increasing gate fidelities and to a potential transferability to industrial CMOS technology, silicon spin qubits have become a compelling option in the strive for quantum computation. In a scalable architecture, each spin qubit will have to be finely tuned and its operating conditions accurately determined. In this prospect, spectroscopic tools compatible with a scalable device layout are of primary importance. Here we report a two-tone spectroscopy technique providing access to the spin-dependent energy-level spectrum of a hole double quantum dot defined in a split-gate silicon device. A first GHz-frequency tone drives electric-dipole spin resonance enabled by the valence-band spin-orbit coupling. A second lower-frequency tone (approximately 500 MHz) allows for dispersive readout via rf-gate reflectometry. We compare the measured dispersive response to the linear response calculated in an extended Jaynes-Cummings model and we obtain characteristic parameters such as g-factors and tunnel/spin-orbit couplings for both even and odd occupation.

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Gate reflectometry in dense quantum dot arrays

Silicon quantum devices are maturing from academic single- and two-qubit devices to industrially-fabricated dense quantum-dot (QD) arrays, increasing operational complexity and the need for better pulsed-gate and readout techniques. We perform gate-voltage pulsing and gate-based reflectometry measurements on a dense 2$\times$2 array of silicon quantum dots fabricated in a 300-mm-wafer foundry. Utilizing the strong capacitive couplings within the array, it is sufficient to monitor only one gate electrode via high-frequency reflectometry to establish single-electron occupation in each of the four dots and to detect single-electron movements with high bandwidth. A global top-gate electrode adjusts the overall tunneling times, while linear combinations of side-gate voltages yield detailed charge stability diagrams. To test for spin physics and Pauli spin blockade at finite magnetic fields, we implement symmetric gate-voltage pulses that directly reveal bidirectional interdot charge relaxation as a function of the detuning between two dots. Charge sensing within the array can be established without the involvement of adjacent electron reservoirs, important for scaling such split-gate devices towards longer 2$\times$N arrays. Our techniques may find use in the scaling of few-dot spin-qubit devices to large-scale quantum processors.

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Remote capacitive sensing in two-dimension quantum-dot arrays

We investigate gate-defined quantum dots in silicon on insulator nanowire field-effect transistors fabricated using a foundry-compatible fully-depleted silicon-on-insulator (FD-SOI) process. A series of split gates wrapped over the silicon nanowire naturally produces a $2\times n$ bilinear array of quantum dots along a single nanowire. We begin by studying the capacitive coupling of quantum dots within such a 2$\times$2 array, and then show how such couplings can be extended across two parallel silicon nanowires coupled together by shared, electrically isolated, 'floating' electrodes. With one quantum dot operating as a single-electron-box sensor, the floating gate serves to enhance the charge sensitivity range, enabling it to detect charge state transitions in a separate silicon nanowire. By comparing measurements from multiple devices we illustrate the impact of the floating gate by quantifying both the charge sensitivity decay as a function of dot-sensor separation and configuration within the dual-nanowire structure.

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Single-electron operation of a silicon-CMOS 2x2 quantum dot array with integrated charge sensing

The advanced nanoscale integration available in silicon complementary metal-oxide-semiconductor (CMOS) technology provides a key motivation for its use in spin-based quantum computing applications. Initial demonstrations of quantum dot formation and spin blockade in CMOS foundry-compatible devices are encouraging, but results are yet to match the control of individual electrons demonstrated in university-fabricated multi-gate designs. We show here that the charge state of quantum dots formed in a CMOS nanowire device can be sensed by using floating gates to electrostatically couple it to a remote single electron transistor (SET) formed in an adjacent nanowire. By biasing the nanowire and gates of the remote SET with respect to the nanowire hosting the quantum dots, we controllably form ancillary quantum dots under the floating gates, thus enabling the demonstration of independent control over charge transitions in a quadruple (2x2) quantum dot array. This device overcomes the limitations associated with measurements based on tunnelling transport through the dots and permits the sensing of all charge transitions, down to the last electron in each dot. We use effective mass theory to investigate the necessary optimization of the device parameters in order to achieve the tunnel rates required for spin-based quantum computation.

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Single-electron control in a foundry-fabricated two-dimensional qubit array

Silicon spin qubits have achieved high-fidelity one- and two-qubit gates, above error correction thresholds, promising an industrial route to fault-tolerant quantum computation. A significant next step for the development of scalable multi-qubit processors is the operation of foundry-fabricated, extendable two-dimensional (2D) arrays. In gallium arsenide, 2D quantum-dot arrays recently allowed coherent spin operations and quantum simulations. In silicon, 2D arrays have been limited to transport measurements in the many-electron regime. Here, we operate a foundry-fabricated silicon 2x2 array in the few-electron regime, achieving single-electron occupation in each of the four gate-defined quantum dots, as well as reconfigurable single, double, and triple dots with tunable tunnel couplings. Pulsed-gate and gate-reflectometry techniques permit single-electron manipulation and single-shot charge readout, while the two-dimensionality allows the spatial exchange of electron pairs. The compact form factor of such arrays, whose foundry fabrication can be extended to larger 2xN arrays, along with the recent demonstration of coherent spin control and readout, paves the way for dense qubit arrays for quantum computation and simulation.

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Charge detection in an array of CMOS quantum dots

The recent development of arrays of quantum dots in semiconductor nanostructures highlights the progress of quantum devices toward large scale. However, how to realize such arrays on a scalable platform such as silicon is still an open question. One of the main challenge resides in the detection of charges within the array. It is a prerequisite functionality to initialize a desired charge state and readout spins through spin-to-charge conversion mechanisms. In this paper, we use two methods based on either a single-lead charge detector, or a reprogrammable single electron transistor. Thanks to these methods, we study the charge dynamics and sensitivity by performing single shot detection of the charge. Finally, we can probe the charge stability at any node of a linear array and assess the Coulomb disorder in the structure. We find an electrochemical potential fluctuation induced by charge noise comparable to that reported in other silicon quantum dots.

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