arXiv subjects

Md Tashfiq Bin Kashem

Publications and source records attributed to Md Tashfiq Bin Kashem.

7 recordsLinked to original sources

arXiv2026

Device Engineering and Performance Optimization of Cu2NiGeS4 Thin-Film Solar Cells with In2S3/MoTe2 Charge-Selective Layers: A Computational Study

The pursuit of efficient and sustainable thin-film photovoltaics increasingly demands absorber materials that combine strong optical absorption with earth-abundant and environmentally benign constituents. Cu2NiGeS4 (CNGS) has emerged as a promising quaternary chalcogenide absorber owing to its favorable optoelectronic properties and high absorption coefficient, yet its photovoltaic potential remains comparatively underexplored, particularly in conjunction with optimized charge-selective layers. Here, we introduce and comprehensively investigate an CNGS-based solar-cell architecture using SCAPS-1D, with In2S3 and MoTe2 serving as the electron and hole-transport layers respectively. The analysis of energy-band profiles, electric fields, carrier distributions, and generation-recombination characteristics reveals the mechanisms governing carrier separation and extraction across the heterojunctions. Systematic optimization of layer thickness, doping density, bulk and interface defect densities, recombination coefficients, parasitic resistances, temperature, and illumination intensity identifies the key factors limiting device performance. The optimized device is predicted to achieve a power conversion efficiency (PCE) of 28.44% with a open-circuit voltage (VOC) of 0.984 V, short-circuit current density (JSC) of 34.39 mA/cm2, and fill factor (FF) of 84.04%, under AM1.5G illumination at 300 K. This simulated efficiency exceeds the previously reported 6.25-21.17% range for CNGS-based solar cells considered in this study. The findings establish In2S3/CNGS/MoTe2 as a promising platform for next-generation thin-film photovoltaics and provide physically grounded design guidelines for absorber optimization, interface engineering, and future experimental realization.

cond-mat.mtrl-sci↗

arXiv2026

Three-Dimensional Optical-Electrical Simulation of Cs2AgBiBr6 Double Perovskite Solar Cells

Despite significant advances in lead-free perovskite photovoltaics, achieving a balance among environmental safety and high optoelectronic performance remains challenging. The inorganic double perovskite Cs2AgBiBr6 has emerged as a promising candidate owing to its robust three-dimensional crystal structure and suitable visible-range bandgap. However, best power conversion efficiencies (PCEs) for Cs2AgBiBr6 solar cells reported so far - 6.37% experimentally and 27.78% in numerical studies - remain below the theoretical performance potential, largely due to suboptimal charge transport layers, and interface-related recombination losses. Here, we address this gap using a 3D finite-element method (FEM) implemented in COMSOL Multiphysics, which couples optical simulations with semiconductor drift-diffusion transport. To our knowledge, this work represents the first comprehensive 3D FEM-based study of a double halide perovskite solar cell. Screening of 25 electron transport layer (ETL)-hole transport layer (HTL) combinations identifies CeO2 and P3HT as the optimal ETL and HTL respectively. Device performance is further analyzed through systematic variation of layer thicknesses, doping concentrations and defect densities within the FTO/CeO2/Cs2AgBiBr6/P3HT/Au architecture. Under optimized parameters, the simulated device achieves a PCE of 31.76%, representing the theoretical upper bound predicted by the model. Overall, this work demonstrates 3D physics-based device engineering as a decisive pathway for overcoming efficiency bottlenecks in lead-free double perovskite photovoltaics.

cond-mat.mtrl-sci↗

arXiv2025

Numerical Modeling of Cu2MnSnS4/FeSi2 Dual-Absorber Solar Cell Achieving High Efficiency

Dual-absorber solar cells represent a promising approach to surpass the efficiency limit of single-junction devices by extending spectral absorption and minimizing thermalization losses. Among earth-abundant thin-film materials, kesterites have attracted considerable interest, however, the well-studied Cu2ZnSnS4 (CZTS) continues to face challenges related to antisite disorder and secondary phase formation. Replacing Zn with Mn in Cu2MnSnS4 (CMTS) mitigates these limitations, improving cation ordering and electronic quality while maintaining favorable optical properties. Yet, despite its potential, CMTS remains largely unexplored in multi-absorber configurations-only one prior study has reported a CMTS-based dual-absorber device. In this work, we present a comprehensive numerical investigation of a CMTS-FeSi2 dual-absorber thin-film solar cell using the one-dimensional solar cell capacitance simulator (SCAPS-1D). FeSi2, with its narrow band gap (0.87 eV) and strong near-infrared absorption, serves as an ideal bottom absorber to complement CMTS, enabling broader spectral utilization. The study systematically examines the effects of geometrical, electronic, and interfacial parameters on carrier transport, and overall device performance. The optimized device delivers an impressive power conversion efficiency of 34.9%, with VOC = 0.79 V, JSC = 51.07 mA/cm2, and a fill factor of 85.91%. These findings demonstrate that integrating FeSi2 with CMTS not only enhances carrier collection and spectral harvesting but also establishes a new pathway toward high-efficiency, sustainable, and environmentally benign thin-film photovoltaics.

cond-mat.mtrl-sci↗

arXiv2025

Dual-Material Double-Gate Source-Pocket Tunnel Field Effect Transistor with Homogeneous Gate Dielectric: Computational Analysis of Structural and Material Parameters for Enhanced Performance

Dual-material double-gate tunnel field effect transistor (DMDG TFET) is a promising candidate for low-power, high-speed electronics due to enhanced electrostatic control and superior switching characteristics. Integrating a pocket region between the source and channel-doped oppositely to the source-further improves tunneling efficiency by modulating the electric field at the tunneling junction. This combined architecture, termed the DMDG source-pocket TFET (DMDG-SP TFET), achieves higher ON current and reduced subthreshold swing compared to conventional TFETs. Previous DMDG-SP TFET designs primarily use heterogeneous gate dielectrics, composed of two stacked insulators to enhance gate control and tunneling modulation. However, such hetero gate dielectrics increase fabrication complexity and may degrade device reliability due to material incompatibility. This work proposes a silicon-based DMDG-SP TFET employing a homogenous gate dielectric, investigated through Silvaco Atlas-based 2-D TCAD simulations, aiming to simplify fabrication without compromising performance. Presence of the pocket results in 6.7x higher ON current and 1.7x lower subthreshold swing compared to pocket-less devices. Dual-material gates boost ON current by 45% and improve the ON/OFF current ratio by 59% compared to single-material gates in pocket-based devices. Detailed simulations analyze effects of gate metal work functions and lengths, gate dielectric constant, and doping densities and lengths of all regions. The optimized device achieves an ON current of 3.16*10^-4 A/um, OFF current of 1.54*10^-17 A/um, ON/OFF ratio of 2.05*10^13, and subthreshold slope of 6.29 mV/decade. These findings offer critical insights for designing manufacturable, high-performance homojunction silicon-based DMDG-SP TFETs with homogeneous gate dielectrics for next-generation low-power integrated circuits.

physics.app-ph↗

arXiv2025

A Comprehensive Computational Photovoltaic Study of Lead-free Inorganic NaSnCl$_3$-based Perovskite Solar Cell: Effect of Charge Transport Layers and Material Parameters

Lead-free all-inorganic halide perovskite solar cells (PSCs) have emerged as a promising alternative to toxic lead-based solar cells and organic solar cells, which have limited stability. This work explores such a PSC with sodium tin chloride (NaSnCl$_3$) as the absorber, due to its significant potential for optoelectronic applications. To investigate this potential, a comprehensive computational analysis of NaSnCl$_3$-based solar cells is performed using the one-dimensional solar cell capacitance simulator (SCAPS -1D). Simulations are performed for device structures with front contact/Indium Tin Oxide (ITO)/electron transport layer (ETL)/NaSnCl$_3$/hole transport layer (HTL)/back contact configuration, where TiO$_2$, SnS$_2$, IGZO, ZnSe, CdS, GaSe, ZnSnN$_2$, WS$_2$, PCBM, STO, and CSTO are utilized as ETLs and CNTS, GO, Mg-CuCrO$_2$, Spiro-OMeTAD, CdTe, GaAs, MoTe$_2$, BaSi$_2$, and P3HT are utilized as HTLs. Based on the obtained power conversion efficiency (PCE), six best ETL-HTL combinations with SnS$_2$, STO, WS$_2$, IGZO, ZnSe and CSTO as ETLs and MoTe$_2$ as HTL are chosen for further analysis. The effects of different material and device parameters, such as thickness and doping density; effective density of states; bulk and interface defects; series and shunt resistance; and operating conditions, such as temperature and light intensity are investigated. Using the optimized material parameters, SnS$_2$ ETL and MoTe$_2$ HTL-based solar cell show the best performance with open circuit voltage, Voc = 1.196V, short circuit current density, Jsc = 35.82 mA/cm$^2$, fill factor, FF = 89.72% and PCE = 38.42%. This detailed study provides valuable insights for the fabrication of high efficiency NaSnCl$_3$-based solar cells.

cond-mat.mtrl-sci↗

arXiv2024

Resistance Drift in Melt-Quenched Ge2Sb2Te5 Phase Change Memory Line Cells at Cryogenic Temperatures

We characterized resistance drift in phase change memory devices in the 80 K to 300 K temperature range by performing measurements on 20 nm thick, ~70-100 nm wide lateral Ge2Sb2Te5 (GST) line cells. The cells were amorphized using 1.5-2.5 V pulses with ~50-100 ns duration leading to ~0.4-1.1 mA peak reset currents resulting in amorphized lengths between ~50 and 700 nm. Resistance drift coefficients in the amorphized cells are calculated using constant voltage measurements starting as fast as within a second after amorphization and for 1 hour duration. Drift coefficients are in the range between ~0.02 and 0.1 with significant device-to-device variability and variations during the measurement period. At lower temperatures (higher resistance states) some devices show a complex dynamic behavior, with the resistance repeatedly increasing and decreasing significantly over periods in the order of seconds.

physics.app-ph↗

arXiv2022

Stopping Resistance Drift in Phase Change Memory Cells and Analysis of Charge Transport in Stable Amorphous Ge2Sb2Te5

We stabilize resistance of melt-quenched amorphous Ge2Sb2Te5 (a-GST) phase change memory (PCM) line cells by substantially accelerating resistance drift and bringing it to a stop within a few minutes with application of high electric field stresses. The acceleration of drift is clearly observable at electric fields > 26 MV/m at all temperatures (85 K - 300 K) and is independent of the current forced through the device, which is a strong function of temperature. The low-field (< 21 MV/m) I-V characteristics of the stabilized cells measured in 85 K - 300 K range fit well to a 2D thermally-activated hopping transport model, yielding hopping distances in the direction of the field and activation energies ranging from 2 nm and 0.2 eV at 85 K to 6 nm and 0.4 eV at 300 K. Hopping transport appears to be better aligned with the field direction at higher temperatures. The high-field current response to voltage is significantly stronger and displays a distinctly different characteristic: the differential resistances at different temperatures extrapolate to a single point (8.9x10-8 ohm.cm), comparable to the resistivity of copper at 60 K, at 65.6 +/- 0.4 MV/m. The physical mechanisms that give rise to the substantial increase in current in the high-field regime also accelerate resistance drift. We constructed field and temperature dependent conduction models based on the experimental results and integrated it with our electro-thermal finite element device simulation framework to analyze reset, set and read operations of PCM devices.

physics.app-ph↗