arXiv subjects

Mengyu Zhang

Publications and source records attributed to Mengyu Zhang.

7 recordsLinked to original sources

arXiv2026

CRLB-Driven Beamforming and Power Allocation for Multi-BS Cooperative ISAC Networks

This paper presents a Cramér-Rao lower bound (CRLB)-driven beamforming (BF) and power allocation (PA) framework for cooperative integrated sensing and communication (ISAC) networks, where a set of multi-antenna base stations (BSs) jointly serve multiple users and simultaneously perform multi-static target estimation. In our design, we investigate how the position error bound (PEB) and velocity error bound (VEB) can be exploited and incorporated into BF and PA optimization. The design leveraging PEB and VEB as metrics directly characterizes sensing accuracy. First, we propose a semidefinite programming (SDP)-based BF, where the PEB and VEB constraints are handled by double Schur complements, and the rank-1 constraints of the BF covariance matrices are relaxed by semidefinite relaxation (SDR), whose tightness is proved using the Karush-Kuhn-Tucker (KKT) conditions. Addressing the complexity, we further develop a two-stage PA algorithm, where the communication and sensing beams are formed by the regularized zero-forcing (RZF) and null-space projection (NSP) methods, respectively, and the communication and sensing PAs are solved sequentially by second-order cone programming (SOCP). Although the PA algorithm sacrifices the degrees of freedom, its performance shows a slight gap compared to BF in the simulation, while the execution time of around 25 ms demonstrates its applicability in dynamic environments.

eess.SP↗

arXiv2026

Extending RLVR to Open-Ended Tasks via Verifiable Multiple-Choice Reformulation

Reinforcement Learning with Verifiable Rewards(RLVR) has demonstrated great potential in enhancing the reasoning capabilities of large language models (LLMs). However, its success has thus far been largely confined to the mathematical and programming domains with clear and automatically checkable outcomes. Reinforcement learning on open-ended tasks (e.g., creative writing and subjective Q&A) continues to rely on reward models due to the absence of verifiable solutions. This raises a key question: how can we extend RLVR to strengthen reasoning in open-ended tasks regardless of the absence of the unambiguous ground truth? To overcome this challenge, we introduce Verifiable Multiple-Choice Reformulation for Reinforcement Learning from Verifiable Rewards (VMR-RLVR), a novel training strategy that restructures open-ended data into verifiable multiple-choice formats, enabling effective training even in the absence of explicit ground truth. Experimental results on multiple benchmarks validate the effectiveness of our method in improving LLM performance on open-ended tasks. Notably, across seven open-ended benchmarks, our VMR-RLVR training delivers an average gain of 3.29 points over the RL with reward model.

cs.AI↗

arXiv2025

Agentic Privacy-Preserving Machine Learning

Privacy-preserving machine learning (PPML) is critical to ensure data privacy in AI. Over the past few years, the community has proposed a wide range of provably secure PPML schemes that rely on various cryptography primitives. However, when it comes to large language models (LLMs) with billions of parameters, the efficiency of PPML is everything but acceptable. For instance, the state-of-the-art solution for confidential LLM inference represents at least 10,000-fold slower performance compared to plaintext inference. The performance gap is even larger when the context length increases. In this position paper, we propose a novel framework named Agentic-PPML to make PPML in LLMs practical. Our key insight is to employ a general-purpose LLM for intent understanding and delegate cryptographically secure inference to specialized models trained on vertical domains. By modularly separating language intent parsing - which typically involves little or no sensitive information - from privacy-critical computation, Agentic-PPML completely eliminates the need for the LLMs to process the encrypted prompts, enabling practical deployment of privacy-preserving LLM-centric services.

cs.CR↗

arXiv2024

A Hardware-Aware Gate Cutting Framework for Practical Quantum Circuit Knitting

Circuit knitting emerges as a promising technique to overcome the limitation of the few physical qubits in near-term quantum hardware by cutting large quantum circuits into smaller subcircuits. Recent research in this area has been primarily oriented towards reducing subcircuit sampling overhead. Unfortunately, these works neglect hardware information during circuit cutting, thus posing significant challenges to the follow on stages. In fact, direct compilation and execution of these partitioned subcircuits yields low-fidelity results, highlighting the need for a more holistic optimization strategy. In this work, we propose a hardware-aware framework aiming to advance the practicability of circuit knitting. Drawing a contrast with prior methodologies, the presented framework designs a cutting scheme that concurrently optimizes the number of gate cuttings and SWAP insertions during circuit cutting. In particular, we leverage the graph similarity between qubits interactions and chip layout as a heuristic guide to reduces potential SWAPs in the subsequent step of qubit routing. Building upon this, the circuit knitting framework we developed has been evaluated on several quantum algorithms, leading to reduction of total subcircuits depth by up to 64% (48% on average) compared to the state-of-the-art approach, and enhancing the relative fidelity up to 2.7$\times$.

cs.AR↗

arXiv2023

A Scalable, Fast and Programmable Neural Decoder for Fault-Tolerant Quantum Computation Using Surface Codes

Quantum error-correcting codes (QECCs) can eliminate the negative effects of quantum noise, the major obstacle to the execution of quantum algorithms. However, realizing practical quantum error correction (QEC) requires resolving many challenges to implement a high-performance real-time decoding system. Many decoding algorithms have been proposed and optimized in the past few decades, of which neural network (NNs) based solutions have drawn an increasing amount of attention due to their high efficiency. Unfortunately, previous works on neural decoders are still at an early stage and have only relatively simple architectures, which makes them unsuitable for practical QEC. In this work, we propose a scalable, fast, and programmable neural decoding system to meet the requirements of FTQEC for rotated surface codes (RSC). Firstly, we propose a hardware-efficient NN decoding algorithm with relatively low complexity and high accuracy. Secondly, we develop a customized hardware decoder with architectural optimizations to reduce latency. Thirdly, our proposed programmable architecture boosts the scalability and flexibility of the decoder by maximizing parallelism. Fourthly, we build an FPGA-based decoding system with integrated control hardware for evaluation. Our $L=5$ ($L$ is the code distance) decoder achieves an extremely low decoding latency of 197 ns, and the $L=7$ configuration also requires only 1.136 $μ$s, both taking $2L$ rounds of syndrome measurements. The accuracy results of our system are close to minimum weight perfect matching (MWPM). Furthermore, our programmable architecture reduces hardware resource consumption by up to $3.0\times$ with only a small latency loss. We validated our approach in real-world scenarios by conducting a proof-of-concept benchmark with practical noise models, including one derived from experimental data gathered from physical hardware.

quant-ph↗

arXiv2021

Rapid and Unconditional Parametric Reset Protocol for Tunable Superconducting Qubits

Qubit initialization is a critical task in quantum computation and communication. Extensive efforts have been made to achieve this with high speed, efficiency and scalability. However, previous approaches have either been measurement-based and required fast feedback, suffered from crosstalk or required sophisticated calibration. Here, we report a fast and high-fidelity reset scheme, avoiding the issues above without any additional chip architecture. By modulating the flux through a transmon qubit, we realize a swap between the qubit and its readout resonator that suppresses the excited state population to 0.08% $\pm$ 0.08% within 34 ns (284 ns if photon depletion of the resonator is required). Furthermore, our approach (i) can achieve effective second excited state depletion, (ii) has negligible effects on neighbouring qubits, and (iii) offers a way to entangle the qubit with an itinerant single photon, useful in quantum communication applications.

quant-ph↗

arXiv2021

Exploiting Different Levels of Parallelism in the Quantum Control Microarchitecture for Superconducting Qubits

As current Noisy Intermediate Scale Quantum (NISQ) devices suffer from decoherence errors, any delay in the instruction execution of quantum control microarchitecture can lead to the loss of quantum information and incorrect computation results. Hence, it is crucial for the control microarchitecture to issue quantum operations to the Quantum Processing Unit (QPU) in time. As in classical microarchitecture, parallelism in quantum programs needs to be exploited for speedup. However, three challenges emerge in the quantum scenario: 1) the quantum feedback control can introduce significant pipeline stall latency; 2) timing control is required for all quantum operations; 3) QPU requires a deterministic operation supply to prevent the accumulation of quantum errors. In this paper, we propose a novel control microarchitecture design to exploit Circuit Level Parallelism (CLP) and Quantum Operation Level Parallelism (QOLP). Firstly, we develop a Multiprocessor architecture to exploit CLP, which supports dynamic scheduling of different sub-circuits. This architecture can handle parallel feedback control and minimize the potential overhead that disrupts the timing control. Secondly, we propose a Quantum Superscalar approach that exploits QOLP by efficiently executing massive quantum instructions in parallel. Both methods issue quantum operations to QPU deterministically. In the benchmark test of a Shor syndrome measurement, a six-core implementation of our proposal achieves up to 2.59$\times$ speedup compared with a single core. For various canonical quantum computing algorithms, our superscalar approach achieves an average of 4.04$\times$ improvement over a baseline design. Finally, We perform a simultaneous randomized benchmarking (simRB) experiment on a real QPU using the proposed microarchitecture for validation.

quant-ph↗