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Merrilyn Mercy Adzo Fiagbenu

Publications and source records attributed to Merrilyn Mercy Adzo Fiagbenu.

2 recordsLinked to original sources

Reconfigurable Compute-In-Memory on Field-Programmable Ferroelectric Diodes

The deluge of sensors and data generating devices has driven a paradigm shift in modern computing from arithmetic-logic centric to data-centric processing. Data-centric processing require innovations at device level to enable novel compute-in-memory (CIM) operations. A key challenge in construction of CIM architectures is the conflicting trade-off between the performance and their flexibility for various essential data operations. Here, we present a transistor-free CIM architecture that permits storage, search and neural network operations on sub-50nm thick Aluminum Scandium Nitride ferroelectric diodes (FeDs). Our circuit designs and devices can be directly integrated on top of Silicon microprocessors in a scalable process. By leveraging the field-programmability, non-volatility and non-linearity of FeDs, search operations are demonstrated with a cell footprint < 0.12 um2 when projected onto 45-nm node technology. We further demonstrate neural network operations with 4-bit operation using FeDs. Our results highlight FeDs as candidates for efficient and multifunctional CIM platforms.

physics.app-ph

Scalable CMOS-BEOL compatible AlScN/2D Channel FE-FETs

Intimate integration of memory devices with logic transistors is a frontier challenge in computer hardware. This integration is essential for augmenting computational power concurrently with enhanced energy efficiency in big-data applications such as artificial intelligence. Despite decades of efforts, reliable, compact, energy efficient and scalable memory devices are elusive. Ferroelectric Field Effect Transistors (FE-FETs) are a promising candidate but their scalability and performance in a back-end-of-line (BEOL) process remain unattained. Here, we present scalable BEOL compatible FE-FETs using two-dimensional (2D) MoS2 channel and AlScN ferroelectric dielectric. We have fabricated a large array of FE-FETs with memory windows larger than 7.8 V, ON/OFF ratios of greater than 10^7, and ON current density greater than 250 uA/um, all at ~80 nm channel lengths. Our devices show stable retention up to 20000 secs and endurance up to 20000 cycles in addition to 4-bit pulse programmable memory features thereby opening a path towards scalable 3D hetero-integration of 2D semiconductor memory with Si CMOS logic.

physics.app-ph